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HB52R649E1U-A6B PDF预览

HB52R649E1U-A6B

更新时间: 2024-11-07 07:02:47
品牌 Logo 应用领域
尔必达 - ELPIDA 存储内存集成电路动态存储器PC时钟
页数 文件大小 规格书
20页 150K
描述
512 MB Registered SDRAM DIMM 64-Mword × 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M × 4 Components) PC100 SDRAM

HB52R649E1U-A6B 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIMM包装说明:DIMM, DIMM168
针数:168Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.36
风险等级:5.92Is Samacsys:N
访问模式:SINGLE BANK PAGE BURST最长访问时间:6.9 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):100 MHz
I/O 类型:COMMONJESD-30 代码:R-XDMA-N168
内存密度:4831838208 bit内存集成电路类型:SYNCHRONOUS DRAM MODULE
内存宽度:72湿度敏感等级:1
功能数量:1端口数量:1
端子数量:168字数:67108864 words
字数代码:64000000工作模式:SYNCHRONOUS
最高工作温度:55 °C最低工作温度:
组织:64MX72输出特性:3-STATE
封装主体材料:UNSPECIFIED封装代码:DIMM
封装等效代码:DIMM168封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY峰值回流温度(摄氏度):225
电源:3.3 V认证状态:Not Qualified
刷新周期:8192自我刷新:YES
最大待机电流:0.546 A子类别:DRAMs
最大压摆率:4.47 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

HB52R649E1U-A6B 数据手册

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HB52R649E1U-A6B/B6B  
512 MB Registered SDRAM DIMM  
64-Mword × 72-bit, 100 MHz Memory Bus, 1-Bank Module  
(18 pcs of 64 M × 4 Components)  
PC100 SDRAM  
E0022H10 (1st edition)  
(Previous ADE-203-1192A (Z))  
Preliminary  
Jan. 31, 2001  
Description  
The HB52R649E1U belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed  
as an optimized main memory solution for 8-byte processor applications. The HB52R649E1U is a 64M × 72  
× 1-bank Synchronous Dynamic RAM Registered Module, mounted 18 pieces of 256-Mbit SDRAM  
(HM5225405BTB) sealed in TCP package, 1 piece of PLL clock driver, 2 pieces of register driver and 1 piece  
of serial EEPROM (2-kbit) for Presence Detect (PD). An outline of the HB52R649E1U is 168-pin socket  
type package (dual lead out). Therefore, the HB52R649E1U makes high density mounting possible without  
surface mount technology. The HB52R649E1U provides common data inputs and outputs. Decoupling  
capacitors are mounted beside each TCP on the module board.  
Note: Do not push the cover or drop the modules in order to protect from mechanical defects, which would  
be electrical defects.  
Features  
Fully compatible with : JEDEC standard outline 8-byte DIMM  
: Intel PCB Reference design (Rev.1.2)  
168-pin socket type package (dual lead out)  
Outline: 133.35 mm (Length) × 30.48 mm (Height) × 4.80 mm (Thickness)  
Lead pitch: 1.27 mm  
3.3 V power supply  
Clock frequency: 100 MHz (max)  
LVTTL interface  
Data bus width: × 72 ECC  
Single pulsed RAS  
4 Banks can operates simultaneously and independently  
Preliminary: The Specifications of this device are subject to change without notice. Please contact to your  
nearest Elpida Memory, Inc. regarding specifications.  
This product became EOL in September, 2002.  
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.  

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