Datasheet > GM71V65163CT-6

GM71V65163CT-6

更新时间： 2024-09-16 23:53:51

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
10页	100K
描述
x16 EDO Page Mode DRAM

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数据手册

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GM71V65163CT-6 数据手册

GM71V65163C

GM71VS65163CL

4,196,304 WORDS x 16 BIT

MOS DYNAMIC RAM

Description

Pin Configuration

50 SOJ / TSOP-II

The GM71V(S)65163C/CL is the new generation

dynamic RAM organized 4,196,304 words by 16

bits. The GM71V(S)65163C/CL utilizes advanced

CMOS Silicon Gate Process Technology as well as

advanced circuit techniques for wide operating

margins, both internally and to the system user.

System oriented features include single power supply

of 3.3V+/-10% tolerance, direct interfacing

capability with high performance logic families such

as Schottky TTL.

VCC

IO0

IO1

IO2

50 VSS

IO15

IO14

47 IO13

IO3

VCC

IO4

IO12

VSS

IO11

IO10

IO5

IO6

IO7

IO9

IO8

The GM71V(S)65163C/CL offers Extended Data

Out(EDO) Mode as a high speed access mode.

VCC

VSS

/WE

/LCAS

/UCAS

Features

/RAS

/OE

* 4,196,304 Words x 16 Bit

* Extended Data Out (EDO) Mode Capability

* Fast Access Time & Cycle Time

NC 17

A11

(Unit: ns)

A10

tRAC

tAA

tCAC

tRC

tHPC

GM71V(S)65163C/CL-5

GM71V(S)65163C/CL-6

A5 24

110

26 VSS

VCC 25

*Power dissipation

- Active : 540mW/504mW(MAX)

(Top View)

- Standby : 1.8 mW ( CMOS level : MAX )

0.54mW ( L-Version : MAX)

*EDO page mode capability

*Access time : 50ns/60ns (max)

*Refresh cycles

- RAS only Refresh

4096 cycles/64 ms (GM71V65163C)

4096 cycles/128ms (GM71VS65163CL)(L_Version)

*CBR & Hidden Refresh

4096 cycles/64 ms (GM71V65163C)

4096 cycles/128 ms (GM71VS65163CL)( L-Version )

*4 variations of refresh

-RAS-only refresh

-CAS-before-RAS refresh

-Hidden refresh

-Self refresh (L-Version)

*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator

*Battery Back Up Operation ( L-Version )

Rev 0.1 / Apr’01

12 3 4 5 6 7...10

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