Datasheet > GM71V64803CT-6

GM71V64803CT-6

更新时间： 2022-01-21 14:59:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
11页	112K
描述
x8 EDO Page Mode DRAM

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数据手册

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GM71V64803CT-6 数据手册

GM71V64803C

GM71VS64803CL

DC Electrical Characteristics: (VCC = 3.3V+/-10%, TA = 0 ~ 70C)

Symbol

Parameter

Min Max Unit Note

VOH

Output Level

Output Level Voltage (IOUT = -2mA)

2.4

VCC

VOL

ICC1

Output Level

Output Level Voltage (IOUT = 2mA)

0.4

Operating Current (tRC = tRC min)

50ns

60ns

125

115

1,2

Standby Current (TTL interface)

Power Supply Standby Current

(RAS, CAS= VIH, DOUT = High-Z)

ICC2

ICC3

50ns

60ns

125

115

RAS-Only Refresh Current

( tRC = tRC min)

50ns

60ns

110

100

0.5

ICC4

ICC5

Extended Data Out page Mode Current

(RAS = VIL, CAS, Address Cycling: tHPC = tHPC min)

mA 1,3

CMOS interface

(RAS, CAS>=VCC-0.2V, DOUT = High-Z)

Standby Current(L_Version)

300

145

135

ICC6

CAS-before-RAS Refresh Current

(tRC = tRC min)

50ns

60ns

Battery Back Up Operating Current(Standby with CBR)

(tRC=31.25us,tRAS=300ns,Dout=High-Z)

ICC7

ICC8

4, 5

500

Standby Current (CMOS)

Power Supply Standby Current

RAS = VIH, CAS = VIL , DOUT = Enable

ICC9

II(L)

Self Refresh Current

(RAS, CAS <=0.2V,Dout=High-Z)

400

Input Leakage Current, Any Input

(0V<=VIN<=Vcc)

-5

IO(L)

Output Leakage Current

(DOUT is Disabled, 0V<=VOUT<=Vcc)

Note: 1. ICC depends on output load condition when the device is selected. ICC(max) is specified at the

output open condition.

2. Address can be changed once or less while RAS = VIL.

3. Measured with one sequential address change per EDO cycle, tHPC.

4. VIH>=VCC-0.2V, 0V<=VIL<=0.2V

5. L-Version

Rev 0.1 / Apr’01

1 234 5 6 7...11

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