Datasheet > GM71V64803CT-6

GM71V64803CT-6

更新时间： 2022-01-21 14:59:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
11页	112K
描述
x8 EDO Page Mode DRAM

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中文翻译

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数据手册

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GM71V64803CT-6 数据手册

GM71V64803C

GM71VS64803CL

Capacitance (VCC = 3.3V+/-10%, TA = 25C)

Symbol

CI1

Parameter

Typ

Max

Unit

Note

Input Capacitance (Address)

Input Capacitance (Clocks)

CI2

CI/O

Output Capacitance (Data-in,Data-Out)

1, 2

Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.

2. RAS, CAS = VIH to disable DOUT.

AC Characteristics (VCC = 3.3V+/-10%, TA = 0 ~ 70C, Notes 1, 2,19)

Test Conditions

Input rise and fall times : 2ns

Input level : VIL/VIH = 0.0/3.0V

Input timing reference levels : VIL/VIH = 0.8/2.0V

Output timing reference levels : VOL/VOH = 0.8/2.0V

Output load : 1 TTL gate+CL (100pF)

(Including scope and jig)

Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)

GM71V(S)64803C/CL-5 GM71V(S)64803C/CL-6

Symbol

Parameter

Notes

Unit

Min

Max

104

Random Read or Write Cycle Time

RAS Precharge Time

10000

CAS Precharge Time

10000

RAS

CAS

ASR

RAH

ASC

CAH

RCD

RAD

RSH

CSH

CRP

RAS Pulse Width

10000

CAS Pulse Width

Row Address Set-up Time

Row Address Hold Time

Column Address Set-up Time

Column Address Hold Time

RAS to CAS Delay Time

RAS to Column Address Delay Time

RAS Hold Time

CAS Hold Time

CAS to RAS Precharge Time

OE to DIN Delay Time

OE Delay Time from DIN

ODD

DZO

DZC

CAS Delay Time from DIN

TransitionTime (Rise and Fall)

Refresh Period

8192

cycles

8192

REF

Refresh Period ( L-Version )

128

cycles

Rev 0.1 / Apr’01

1 2 345 6 7...11

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