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FSTUD16450 PDF预览

FSTUD16450

更新时间: 2024-11-12 22:17:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 开关
页数 文件大小 规格书
11页 418K
描述
Configurable 4-Bit to 20-Bit Bus Switch with -2V Undershoot Protection and Selectable Level Shifting

FSTUD16450 数据手册

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January 2001  
Revised August 2001  
FSTUD16450  
Configurable 4-Bit to 20-Bit Bus Switch with  
-2V Undershoot Protection and Selectable Level Shifting  
General Description  
Features  
Undershoot hardened to 2V (A and B Ports)  
The Fairchild Universal Bus Switch FSTUD16450 provides  
4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit of high-speed CMOS  
TTL-compatible bus switching. The low On Resistance of  
the switch allows inputs to be connected to outputs without  
adding propagation delay or generating additional ground  
bounce noise.  
Voltage level shifting  
4switch connection between two ports  
Minimal propagation delay through the switch  
Low lCC  
The FSTUD16450 is designed to allow “customer” configu-  
ration control of the enable connections. The device is  
organized as either a 4-bit, 5-bit, 10-bit or 20-bit bus switch.  
8-bit and 16-bit configurations are also achievable (see  
Functional Description). The device's bit configuration is  
chosen through select pin logic. (see Truth Table). When  
OEx is LOW, Port Ax is connected to Port Bx. When OEx is  
Zero bounce in flow-through mode  
Control inputs compatible with TTL level  
See Applications Note AN-5008 for details  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Applications Note  
Select pins S0, S1, S2 are intended to be used as static  
user configurable control pins. The AC performance of  
these pins has not been characterized or tested. Switching  
of these select pins during system operation may tempo-  
rarily disrupt output logic states and/or enable pin controls.  
HIGH, the switch is OPEN.  
The A and B Ports are “undershoot hardened” with UHC  
protection to support an extended range to 2.0V below  
ground. Fairchild's integrated “Undershoot Hardened  
Circuit” (UHC) senses undershoot at the I/O's, and  
responds by preventing voltage differentials from develop-  
ing and turning on the switch.  
Another key device feature is the addition of a level shifting  
select pin, “S2”. When S2 is LOW, the device behaves as a  
standard N-MOS switch. When S2 is HIGH, a diode to VCC  
is integrated into the circuit allowing for level shifting  
between 5V inputs and 3.3V outputs.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
FSTUD16450GX  
(Note 1)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[Tape and Reel]  
FSTUD16450MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Note 1: BGA package available in Tape and Reel only.  
UHC is a trademark of Fairchild Semiconductor Corporation.  
© 2001 Fairchild Semiconductor Corporation  
DS500391  
www.fairchildsemi.com  

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