Datasheet > EPC4

EPC4

更新时间： 2022-12-28 03:35:18

品牌	Logo	应用领域
阿尔特拉 - ALTERA		静态存储器
页数	文件大小	规格书
36页	470K
描述
SRAM-Based LUT Devices

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EPC4 数据手册

Configuration Devices for SRAM-Based LUT Devices Data Sheet

Table 22. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 &

EPC1441 Devices at 5.0-V

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

t_CE

OEhigh to first clock delay

OEhigh to data output enabled

DCLKto data out delay

200

t_OEZX

t_CO

t_MCH

DCLKhigh time for the first device in the

configuration chain

t_MCL

DCLKlow time for the first device in the

configuration chain

f_CK

Clock frequency

6.7

16.7

MHz

t_SCH

t_SCL

t_CASC

t_CCA

f_CDOE

t_OEC

t_NRCAS

t_NRR

DCLKhigh time for subsequent devices

DCLKlow time for subsequent devices

CLKrising edge to nCASC

nCSto nCASCcascade delay

CLKto data enable/disable

OElow to CLKdisable delay

OElow (reset) to nCASCdelay

OElow time (reset) minimum

100

Table 23. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 &

EPC1441 Devices at 3.3-V

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

t_CE

OEhigh to first clock delay

OEhigh to data output enabled

DCLKto data out delay

300

t_OEZX

t_CO

t_MCH

DCLKhigh time for the first device in the

configuration chain

125

250

t_MCL

DCLKlow time for the first device in the

configuration chain

250

f_CK

Clock frequency

MHz

t_SCH

t_SCL

t_CASC

t_CCA

f_CDOE

t_OEC

t_NRCAS

t_NRR

DCLKhigh time for subsequent devices

DCLKlow time for subsequent devices

CLKrising edge to nCASC

nCSto nCASCcascade delay

CLKto data enable/disable

OElow to CLKdisable delay

OElow (reset) to nCASCdelay

OElow time (reset) minimum

100

Altera Corporation

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