Datasheet > EMD08N06A

EMD08N06A

更新时间： 2024-12-01 17:15:23

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
6页	218K
描述
TO252-2

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数据手册

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EMD08N06A 数据手册

EMD08N06A

N‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

RDSON (MAX.)

60V

8mΩ

60A

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_C= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±20

UNIT

Gate‐Source Voltage

V_GS

T_C= 25 °C

Continuous Drain Current

I_D

T_C= 100 °C

Pulsed Drain Current^1,3

I_DM

I_AS

170

Avalanche Current

L = 0.1mH, ID=60A, RG=25Ω

L = 0.05mH

Avalanche Energy

E_AS

E_AR

180

Repetitive Avalanche Energy²

T_C= 25 °C

Power Dissipation

P_D

°C

T_C= 100 °C

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

100% UIS testing in condition of V_D=30V, L=0.1mH, V_G=10V, I_L=40A, Rated V_DS=60V N-CH

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

Junction‐to‐Case

Junction‐to‐Ambient

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

2.5

°C / W

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³Pulsed drain current rating is package limited.

2014/8/15

p.1

12 3 4 5 6

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