Datasheet > EMD11N15E

EMD11N15E

更新时间： 2024-12-01 17:15:43

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
6页	453K
描述
TO220-3

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中文翻译

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EMD11N15E 数据手册

EMD11N15E

Single N-Channel Logic Level Enhancement Mode Field Effect Transistor

▪Product Summary:

▪ Pin Description:

N-CH

150V

BVDSS

R_{DSON (MAX.)}@V_GS=10V

I_D@T_C=25℃

I_D@T_A=25℃

11.0mΩ

120A

10A

Single N Channel MOSFET

Rg 100% Tested

Pb-Free Lead Plating & Halogen Free

▪ABSOLUTE MAXIMUM RATINGS (T_C= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS SYMBOL

Gate-Source Voltage

LIMITS

UNIT

V_GS

I_D

±20

120

T_C= 25 °C

T_C= 100 °C

T_A= 25 °C

T_A= 70 °C

Continuous Drain Current

I_D

Continuous Drain Current

Pulsed Drain Current¹

Avalanche Current

I_DM

I_AS

400

Avalanche Energy

L = 0.1mH

L = 0.05mH

T_C= 25 °C

T_C= 100 °C

T_A= 25 °C

T_A= 70 °C

125.0

62.5

277.8

111.1

1.3

-55 to 150

EAS

EAR

Repetitive Avalanche Energy²

P_D

Power Dissipation

P_D

Power Dissipation

°C

Operating Junction & Storage Temperature Range

T_j, T_stg

▪THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

UNIT

R_θJC

R_θJA

Junction-to-Case

0.45

62.5

°C/W

Junction-to-Ambient³

¹Pulse width limited by maximum junction temperature.

²Duty cycle < 1％

³62.5°C / W when mounted on a 1 in²pad of 2 oz copper.

⁴Guarantee by Engineering test

2021/3/15

A.0

P.1

12 3 4 5 6

中文翻译

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