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EMB12N10H PDF预览

EMB12N10H

更新时间: 2024-09-16 17:15:31
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杰力科技 - EXCELLIANCE /
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6页 502K
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EDFN5X6

EMB12N10H 数据手册

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EMB12N10H  
Single N-Channel Logic Level Enhancement Mode Field Effect Transistor  
▪Product Summary:  
▪ Pin Description:  
N-CH  
100V  
BVDSS  
RDSON (MAX.)@VGS=10V  
RDSON (MAX.)@VGS=4.5V  
ID @TC=25  
12.0mΩ  
15.0mΩ  
90.0A  
ID @TA=25℃  
11.0A  
Single N Channel MOSFET  
UIS, Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS SYMBOL  
Gate-Source Voltage  
LIMITS  
UNIT  
VGS  
ID  
±20  
90  
57  
11  
8
V
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
Continuous Drain Current  
ID  
Continuous Drain Current  
A
Pulsed Drain Current1  
Avalanche Current  
IDM  
IAS  
152  
22  
Avalanche Energy  
L = 0.1mH  
L = 0.05mH  
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
24.2  
12.1  
166.7  
66.7  
2.5  
1.6  
-55 to 150  
EAS  
EAR  
mJ  
W
Repetitive Avalanche Energy2  
PD  
Power Dissipation  
PD  
Power Dissipation  
W
°C  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
100% UIS testing in condition of VD=50V, L=0.1mH, VG=10V, IL=13.5A, Rated VDS=100V N-CH  
▪THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
TYPICAL  
MAXIMUM  
UNIT  
RθJC  
RθJA  
Junction-to-Case  
0.75  
50  
°C/W  
Junction-to-Ambient3  
1Pulse width limited by maximum junction temperature.  
2Duty cycle < 1%  
350°C / W when mounted on a 1 in2 pad of 2 oz copper.  
4Guarantee by Engineering test  
2021/1/8  
A.2  
P.1