Datasheet > EMB14P03V

EMB14P03V

更新时间： 2024-11-19 17:15:51

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
7页	164K
描述
EDFN3X3

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中文翻译

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数据手册

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EMB14P03V 数据手册

EMB14P03V

P-Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

-30V

14mΩ

-20A

DSON (MAX.)

PIN1

P Channel MOSFET

UIS, Rg 100% Tested

Pb-Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

V_GS

LIMITS

±25

UNIT

Gate-Source Voltage

T_C= 25 °C

-20

Continuous Drain Current

I_D

T_A= 25 °C

-11

-15

-80

-19

T_C= 100 °C

Pulsed Drain Current¹

I_DM

I_AS

Avalanche Current

L = 0.5mH, I_AS=-19A, R

G=25Ω

Avalanche Energy

E_AS

E_AR

Repetitive Avalanche Energy²

L = 0.25mH

T_A= 25 °C

2.5

Power Dissipation

P_D

°C

T_A= 100 °C

Operating Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_θJC

TYPICAL

MAXIMUM

UNIT

Junction-to-Case

°C / W

Junction-to-Ambient³

R_θJA

¹Pulse width limited by maximum junction temperature.

²Duty cycle ≤ 1％

³50°C / W when mounted on a 1 in²pad of 2 oz copper.

2018/11/05

p.1

12 3 4 5 6 7

中文翻译

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