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EMB15A03V PDF预览

EMB15A03V

更新时间: 2024-11-07 17:15:31
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杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
6页 468K
描述
EDFN3X3

EMB15A03V 数据手册

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EMB15A03V  
Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor  
▪Product Summary:  
▪ Pin Description:  
N-CH  
30V  
BVDSS  
RDSON (MAX.)@VGS=10V  
RDSON (MAX.)@VGS=4.5V  
ID @TC=25  
12.0mΩ  
19.0mΩ  
28.0A  
10.0A  
ID @TA=25℃  
Dual N Channel MOSFET  
UIS, Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS SYMBOL  
Gate-Source Voltage  
LIMITS  
UNIT  
VGS  
ID  
±20  
28  
18  
10  
8
V
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
Continuous Drain Current  
ID  
Continuous Drain Current  
A
Pulsed Drain Current1  
Avalanche Current  
IDM  
IAS  
112  
30  
Avalanche Energy  
L = 0.1mH  
L = 0.05mH  
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
45.0  
22.5  
16.7  
6.7  
2.3  
1.5  
EAS  
EAR  
mJ  
W
Repetitive Avalanche Energy2  
PD  
Power Dissipation  
PD  
Power Dissipation  
W
°C  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
-55 to 150  
▪THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
TYPICAL  
MAXIMUM  
UNIT  
RθJC  
RθJA  
Junction-to-Case  
7.5  
55  
°C/W  
Junction-to-Ambient3  
1Pulse width limited by maximum junction temperature.  
2Duty cycle < 1%  
355°C / W when mounted on a 1 in2 pad of 2 oz copper.  
4Guarantee by Engineering test  
2020/11/12  
A.1  
P.1