Datasheet > 存储 > SRAM> EDI2GG464128V95D

EDI2GG464128V95D

更新时间： 2024-09-20 03:12:43

品牌	Logo	应用领域
WEDC		存储内存集成电路静态存储器
页数	文件大小	规格书
8页	249K
描述
4MB SYNCHRONOUS CARD EDGE DIMM

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中文翻译

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EDI2GG464128V95D 数据手册

EDI2GG464128V

White Electronic Designs

4MB SYNCHRONOUS CARD EDGE DIMM

FEATURES

DESCRIPTION

ꢀ

4x128Kx64 Synchronous

The EDI2KG64128VxxD is a Synchronous SRAM,

60 position Card Edge DIMM (120 contacts) Module,

organized as 4x128Kx64. The Module contains eight

(8) Synchronous Burst Ram Devices, packaged in the

industry standard JEDEC 14mmx20mm TQFP placed on

a Multilayer FR4 Substrate. The module architecture is

deﬁned as a Synchronous Only, Flow-Through, Early Write

Device. This module provides High Performance, Ultra

Fast access times at a cost per bit beneﬁt over BiCMOS

Asynchronous SRAM based devices. As well as improved

cost per bit, the use of Synchronous or Synchronous Burst

devices or modules can ease the memory subsystem

design by reducing or easing the memory controller

requirement.

Access Speed(s): T_KHQV= 9.5, 10, 11, 12, 15ns

Flow-Through Architecture

Clock Controlled Registered Bank Enables (E1#,

E2#, E3#, E4#)

ꢀ

Clock Controlled Registered Address

Clock Controlled Registered Global Write (GW#)

Aysnchronous Output Enable (G#)

Internally self-timed Write

Gold Lead Finish

3.3V +10%, -5% Operation

Access Speed(s): t_KHQV= 9.5, 10, 11, 12, 15ns

Common Data I/O

Synchronous operations are in relation to an externally

supplied clock, Registered Address, Registered Global

Write, Registered Enables as well as an Asynchronous

Output enable. All read and write operations to this module

are performed on Quad Words (64 bit operations).

High Capacitance (30pf) drive, at rated Access

Speed

ꢀ

Single total array Clock

Multiple Vcc and GND

Write cycles are internally self timed and are initiated by

a rising clock edge. This feature relieves the designer the

task of developing external write pulse width circuitry.

*This product is subject to change without notice.

PIN NAMES

DQ0-DQ63

A015

Input/Output Bus

Address Bus

E1#, E2#,

E3#, E4#

Synchronous Bank Enables

Array Clock

GW#

Synchronous Global Write Enable

Asynchronous Output Enable

3.3V Power Supply

Ground

Vcc

Vss

No Connect

October 2004

Rev. 1

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7 8

中文翻译

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与EDI2GG464128V95D相关器件

型号	品牌	获取价格	描述	数据表
EDI2GG464128V-D	ETC	获取价格	SSRAM Modules
EDI2GG46464V10D	WEDC	获取价格	SRAM Card, 256KX64, 10ns, CMOS, CARD EDGE, DIMM-120
EDI2GG46464V11D	WEDC	获取价格	SRAM Card, 256KX64, 11ns, CMOS, CARD EDGE, DIMM-120
EDI2GG46464V15D	WEDC	获取价格	SRAM Card, 256KX64, 15ns, CMOS, CARD EDGE, DIMM-120
EDI2GG46464V95D	WEDC	获取价格	SRAM Card, 256KX64, 9.5ns, CMOS, CARD EDGE, DIMM-120
EDI2KG418128V11D	WEDC	获取价格	SRAM Module, 512KX18, 11ns, CMOS, PDMA120,
EDI2KG418128V12D	WEDC	获取价格	SRAM Module, 512KX18, 12ns, CMOS, PDMA120,
EDI2KG418128V15D	WEDC	获取价格	SRAM Module, 512KX18, 15ns, CMOS, PDMA120,
EDI2KG432128V11D	WEDC	获取价格	SRAM Module, 512KX32, 11ns, CMOS, PDMA120,
EDI2KG432128V12D	WEDC	获取价格	SRAM Module, 512KX32, 12ns, CMOS, PDMA120,

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