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DSP56301UMAD

更新时间： 2024-11-23 23:49:15

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DSP56301 Users Manual Addendum

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DSP56301UMAD 数据手册

Freescale Semiconductor, Inc.

Addendum

DSP56301UMAD/D

Rev. 3, 5/2003

DSP56301 User’s

Manual Addendum

CONTENTS

1 Introduction

Introduction...............1

Modified Signal

This document provides updated information for revision 3 of the DSP56301 User’s Manual

(DSP56301UM/D). The updates include the following:

Definitions.................1

Operating Mode

Definition...................3

DMA Control Register

5–0 (DCR[5–0])

• Modified signal definitions

• Updated Operating Mode Register (OMR) bit definition

• Updated DMA Control Register (DCR) bit definition

• Updated SCI Receive Register (SRX) description

Definition...................4

SCI Receive Register

(SRX) Description .....5

UpdatedProgramming

Sheets.........................5

• Updated Programming sheets for the OMR, Address Attribute Registers (AAR[3–0]), DMA Control

Registers 5–0 (DMR[5–0]), Timer Registers (TLR, TCPR, and TCR), and Host Data Direction and

Data Registers (DIRH and DATH)

2 Modified Signal Definitions

Area to Change

Change Description

Table 2-1, p. 2-1

•

For Notes 1–4, delete the last sentence in each note.

Delete Note 5.

Figure 2-1, p. 2-2

Table 2-2, p. 2-4

Table 2-7, p. 2-6

•

In the figure, change Grounds: to Grounds :

At the bottom of the figure, add the following:

4. The GND signals are listed for the 208-pin TQFP package. For the 252-ball

MAP-BGA package, all grounds except GND_Pand GND_P1are connected together

and referenced as GND.

What’s New?

See page 2. The note

reference for Table

2-12, signal HP31

changed from ²to ⁴.

•

Add the following note at the end of the table:

Note:

The subsystem GND signals (GND_Q, GND , GND_D, GND_N, GND_H, and

GND_S) are listed for the 208-pin TQFP package. For the 252-ball MAP-BGA

package, all grounds except GND_Pand GND_P1are connected together inside

the package and referenced as GND.

•

Delete the last sentence of the signal description for D[0–23]. The DSP56301 does not

have internal keeper circuits.

Table 2-8, pp. 2-7

and 2-8

•

Change the title of the third column to State During Reset, Stop, or Wait

Change BS signal name to BS

Change BR signal State During Reset, Stop, or Wait to:

Reset: Output (deasserted)

State during Stop/Wait depends on BRH bit setting:

• BRH = 0: Output, deasserted

• BRH = 1: Maintains last state (that is, if asserted, remains asserted)

Change BB signal State During Reset, Stop, or Wait to Ignored input

•

For More Information On This Product,

Go to: www.freescale.com

12 3 4 5 6 7...12

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