5秒后页面跳转
DS90LV110ATMT PDF预览

DS90LV110ATMT

更新时间: 2024-09-28 11:11:39
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动光电二极管逻辑集成电路
页数 文件大小 规格书
18页 739K
描述
具有失效防护的 1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to 85

DS90LV110ATMT 技术参数

生命周期:Not Recommended零件包装代码:SSOP
包装说明:TSSOP, TSSOP28,.25针数:28
Reach Compliance Code:not_compliantECCN代码:5A991.B.1
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:7.47系列:90LV
输入调节:DIFFERENTIALJESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:9.7 mm
负载电容(CL):5 pF逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:28
实输出次数:10最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TUBE
峰值回流温度(摄氏度):235电源:3.3 V
最大电源电流(ICC):160 mAProp。Delay @ Nom-Sup:3.9 ns
传播延迟(tpd):3.9 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.091 ns座面最大高度:1.1 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

DS90LV110ATMT 数据手册

 浏览型号DS90LV110ATMT的Datasheet PDF文件第2页浏览型号DS90LV110ATMT的Datasheet PDF文件第3页浏览型号DS90LV110ATMT的Datasheet PDF文件第4页浏览型号DS90LV110ATMT的Datasheet PDF文件第5页浏览型号DS90LV110ATMT的Datasheet PDF文件第6页浏览型号DS90LV110ATMT的Datasheet PDF文件第7页 
DS90LV110AT  
www.ti.com  
SNOSAC2J AUGUST 2004REVISED APRIL 2013  
DS90LV110AT 1 to 10 LVDS Data/Clock Distributor with Failsafe  
Check for Samples: DS90LV110AT  
1
FEATURES  
DESCRIPTION  
DS90LV110A is a 1 to 10 data/clock distributor  
utilizing LVDS (Low Voltage Differential Signaling)  
technology for low power, high speed operation. Data  
paths are fully differential from input to output for low  
noise generation and low pulse width distortion. The  
design allows connection of 1 input to all 10 outputs.  
LVDS I/O enable high speed data transmission for  
point-to-point interconnects. This device can be used  
as a high speed differential 1 to 10 signal distribution  
/ fanout replacing multi-drop bus applications for  
higher speed links with improved signal quality. It can  
also be used for clock distribution up to 200MHz.  
2
Low jitter 400 Mbps fully differential data path  
145 ps (typ) of pk-pk jitter with PRBS = 2231  
data pattern at 400 Mbps  
Single +3.3 V Supply  
Balanced output impedance  
Output channel-to-channel skew is 35ps (typ)  
Differential output voltage (VOD) is 320mV (typ)  
with 100Ω termination load.  
LVDS receiver inputs accept LVPECL signals  
LVDS input failsafe  
The DS90LV110A accepts LVDS signal levels,  
LVPECL levels directly or PECL with attenuation  
networks.  
Fast propagation delay of 2.8 ns (typ)  
Receiver open, shorted, and terminated input  
failsafe  
The LVDS outputs can be put into TRI-STATE by use  
of the enable pin.  
28 lead TSSOP package  
Conforms to ANSI/TIA/EIA-644 LVDS standard  
For more details, please refer to the APPLICATION  
INFORMATION section of this datasheet.  
Connection Diagram  
Order Number DS90LV110ATMT  
PW0028A Package  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2013, Texas Instruments Incorporated  
 

DS90LV110ATMT 替代型号

型号 品牌 替代类型 描述 数据表
DS90LV110ATMTX/NOPB TI

完全替代

具有失效防护的 1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to
DS90LV110TMTC/NOPB TI

类似代替

1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to 85

与DS90LV110ATMT相关器件

型号 品牌 获取价格 描述 数据表
DS90LV110ATMT/NOPB TI

获取价格

具有失效防护的 1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to
DS90LV110ATMTX NSC

获取价格

IC 90LV SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28, TS
DS90LV110ATMTX/NOPB TI

获取价格

具有失效防护的 1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to
DS90LV110T NSC

获取价格

1 to 10 LVDS Data/Clock Distributor
DS90LV110T TI

获取价格

1:10 LVDS 数据/时钟分配器
DS90LV110T_07 NSC

获取价格

1 to 10 LVDS Data/Clock Distributor
DS90LV110TMTC NSC

获取价格

1 to 10 LVDS Data/Clock Distributor
DS90LV110TMTC TI

获取价格

1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to 85
DS90LV110TMTC/NOPB TI

获取价格

1:10 LVDS 数据/时钟分配器 | PW | 28 | -40 to 85
DS90LV110TMTCX NSC

获取价格

IC 90LV SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28, TS