Datasheet > DS90LV110T

DS90LV110T

更新时间： 2024-09-28 11:11:39

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1:10 LVDS 数据/时钟分配器

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DS90LV110T 数据手册

DS90LV110T

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SNOS522I –JANUARY 2001–REVISED APRIL 2013

DS90LV110T 1 to 10 LVDS Data/Clock Distributor

Check for Samples: DS90LV110T

FEATURES

DESCRIPTION

DS90LV110 is a 1 to 10 data/clock distributor utilizing

LVDS (Low Voltage Differential Signaling) technology

for low power, high speed operation. Data paths are

fully differential from input to output for low noise

generation and low pulse width distortion. The design

allows connection of 1 input to all 10 outputs. LVDS

I/O enable high speed data transmission for point-to-

point interconnects. This device can be used as a

high speed differential 1 to 10 signal distribution /

fanout replacing multi-drop bus applications for higher

speed links with improved signal quality. It can also

be used for clock distribution up to 400MHz.

•

Low jitter 800 Mbps fully differential data path

145 ps (typ) of pk-pk jitter with PRBS = 2²³−1

data pattern at 800 Mbps

•

Single +3.3 V Supply

Less than 413 mW (typ) total power dissipation

Balanced output impedance

Output channel-to-channel skew is 35ps (typ)

Differential output voltage (V_OD) is 320mV (typ)

with 100Ω termination load.

•

LVDS receiver inputs accept LVPECL signals

Fast propagation delay of 2.8 ns (typ)

Receiver input threshold < ±100 mV

28 lead TSSOP package

The DS90LV110 accepts LVDS signal levels,

LVPECL levels directly or PECL with attenuation

networks.

The LVDS outputs can be put into TRI-STATE by use

of the enable pin.

Conforms to ANSI/TIA/EIA-644 LVDS standard

For more details, please refer to the APPLICATION

INFORMATION section of this datasheet.

Connection Diagram

Order Number DS90LV110TMTC

PW0028A Package

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...18

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与DS90LV110T相关器件

型号	品牌	获取价格	描述	数据表
DS90LV110T_07	NSC	获取价格	1 to 10 LVDS Data/Clock Distributor
DS90LV110TMTC	NSC	获取价格	1 to 10 LVDS Data/Clock Distributor
DS90LV110TMTC	TI	获取价格	1:10 LVDS 数据/时钟分配器 \| PW \| 28 \| -40 to 85
DS90LV110TMTC/NOPB	TI	获取价格	1:10 LVDS 数据/时钟分配器 \| PW \| 28 \| -40 to 85
DS90LV110TMTCX	NSC	获取价格	IC 90LV SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28, TS
DS90LV110TMTCX	TI	获取价格	90LV SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28, TSSOP
DS90LV110TMTCX/NOPB	NSC	获取价格	IC 90LV SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28, TS
DS90LV110TMTCX/NOPB	TI	获取价格	1:10 LVDS 数据/时钟分配器 \| PW \| 28 \| -40 to 85
DS90LV804	NSC	获取价格	4-Channel 800 Mbps LVDS Buffer/Repeater
DS90LV804	TI	获取价格	4 通道 800Mbps LVDS 缓冲器/中继器

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