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DS90LV804TSQ PDF预览

DS90LV804TSQ

更新时间: 2024-09-27 04:39:15
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动器接口集成电路电视中继器PC
页数 文件大小 规格书
10页 228K
描述
4-Channel 800 Mbps LVDS Buffer/Repeater

DS90LV804TSQ 数据手册

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May 2007  
DS90LV804  
4-Channel 800 Mbps LVDS Buffer/Repeater  
General Description  
Features  
The DS90LV804 is a four channel 800 Mbps LVDS buffer/  
repeater. In many large systems, signals are distributed  
across cables and signal integrity is highly dependent on the  
data rate, cable type, length, and the termination scheme. In  
order to maximize signal integrity, the DS90LV804 features  
both an internal input and output (source) termination to elim-  
inate these extra components from the board, and to also  
place the terminations as close as possible to receiver inputs  
and driver output. This is especially significant when driving  
longer cables.  
800 Mbps data rate per channel  
Low output skew and jitter  
Hot plug protection  
LVDS/CML/LVPECL compatible input, LVDS output  
On-chip 100input and output termination  
15 kV ESD protection on LVDS Inputs and Outputs  
Single 3.3V supply  
Very low power consumption  
Industrial -40 to +85°C temperature range  
Small LLP Package Footprint  
The DS90LV804, available in the LLP (Leadless Leadframe  
Package) package, minimizes the footprint, and improves  
system performance.  
An output enable pin is provided, which allows the user to  
place the LVDS outputs and internal biasing generators in a  
TRI-STATE, low power mode.  
The differential inputs interface to LVDS, and Bus LVDS sig-  
nals such as those on National's 10-, 16-, and 18- bit Bus  
LVDS SerDes, as well as CML and LVPECL. The differential  
inputs are internally terminated with a 100resistor to im-  
prove performance and minimize board space. This function  
function is especially useful for boosting signals over lossy  
cables or point-to-point backplane configurations.  
Typical Application  
20156720  
© 2007 National Semiconductor Corporation  
201567  
www.national.com  

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