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DS2196L PDF预览

DS2196L

更新时间: 2024-10-27 22:50:51
品牌 Logo 应用领域
达拉斯 - DALLAS 数字传输控制器电信集成电路电信电路
页数 文件大小 规格书
157页 707K
描述
T1 Dual Framer LIU

DS2196L 技术参数

生命周期:Transferred包装说明:LQFP-100
Reach Compliance Code:unknown风险等级:5.7
Is Samacsys:NJESD-30 代码:S-PQFP-G100
功能数量:2端子数量:100
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装形状:SQUARE
封装形式:FLATPACK认证状态:Not Qualified
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:FRAMER温度等级:COMMERCIAL
端子形式:GULL WING端子位置:QUAD
Base Number Matches:1

DS2196L 数据手册

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DS2196  
T1 Dual Framer LIU  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
The DS2196 T1 dual framer LIU is designed for T1  
transmission equipment. The DS2196 combines dual  
optimized framers together with a LIU. This  
combination allows the users to extract and insert  
facility data-link (FDL) messages in the receive and  
transmit paths, collect line performance data, and  
perform basic channel conditioning and maintenance.  
The DS2196 contains all of the necessary functions  
for connection to T1 lines whether they are DS1 long  
haul or DSX–1 short haul. The clock recovery  
circuitry automatically adjusts to T1 lines from 0ft to  
over 6000ft in length. The device can generate both  
DSX–1 line buildouts as well as CSU line buildouts  
of -7.5dB, -15dB, and -22.5dB. The on-board jitter  
attenuator (selectable to either 32 bits or 128 bits) can  
be placed in either the transmit or receive data paths.  
The framer locates the frame and multiframe  
boundaries and monitors the data stream for alarms.  
The device contains a set of internal registers that the  
user can access and use to control the unit’s operation  
of the unit. Quick access through the parallel control  
port allows a single controller to handle many T1  
lines. The device fully meets all of the latest T1  
specifications.  
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Two full-featured framers and a short/long-haul  
line interface unit (LIU) in one small package  
Based on Dallas Semiconductor’s single-chip  
transceiver (SCT) family  
Two HDLC controllers with 64-byte buffers that  
can be used for the FDL or DS0 channels  
Supports NPRMs and SPRMs as per ANSI  
T1.403-1998  
Can be combined with a short/long-haul LIU or a  
HDSL modem chipset to create a low-cost office  
repeater/NIU/CSU, or a HDSL1/HDSL2 terminal  
unit with enhanced monitoring and data link  
control  
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Supports fractional T1  
Can convert from D4 to ESF framing and ESF to  
D4 framing  
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32-bit or 128-bit crystal-less jitter attenuator  
Can generate and detect repeating in-band  
patterns from 1 to 8 bits or 16 bits in length  
Detects and generates RAI-CI and AIS-CI  
Generates DS1 idle codes  
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On-chip programmable BERT generator and  
detector  
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All key signals are routed to pins to support  
numerous hardware configurations  
PACKAGE OUTLINE  
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Supports both NRZ and bipolar interfaces  
Can create errors in the F-bit position and BERT  
interface data paths  
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8-bit parallel control port that can be used  
directly on either multiplexed or nonmultiplexed  
buses (Intel or Motorola)  
DS2196  
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IEEE 1149.1 JTAG Boundary Scan  
3.3V supply with 5V tolerant inputs and outputs  
100-pin LQFP (14 mm x 14 mm) package  
100  
ORDERING INFORMATION  
PART  
TEMP RANGE PIN-PACKAGE  
0ºC to +70ºC 100 LQFP  
-40ºC to +85ºC 100 LQFP  
1
DS2196L  
DS2196LN  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
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