SPICE MODEL: DMN2005DLP4K
DMN2005DLP4K
DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR
Features
•
•
•
•
•
•
•
•
•
Low On-Resistance
Very Low Gate Threshold Voltage, 0.9V Max.
Fast Switching Speed
D1
DFN1310H4-6
Min Max
G2
S2
Dim
A
Typ
Low Input/Output Leakage
1.25 1.38 1.30
0.95 1.08 1.00
0.20 0.30 0.25
Ultra-Small Surface Mount Package
Lead Free By Design/RoHS Compliant (Note 2)
"Green" Device (Note 4)
ESD Protected Gate
Ultra Low Profile Package
B
C
S1
G1
D2
D*
E**
G
-
-
-
-
0.10
0.20
-
Top View
Mechanical Data
-
0.40
G
•
•
Case: DFN1310H4-6
H
H
0
0.05 0.20
Case Material: Molded Plastic, “Green” Molding
Compound. UL Flammability Classification Rating
94V-0
Moisture Sensitivity: Level 1 per J-STD-020C
Terminal Connections: See Diagram
Terminals: Finish ⎯ NiPdAu annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
Marking: See Page 4
Ordering & Date Code Information: See Page 4
K*
L*
0.10 0.20 0.15
0.30 0.50 0.40
Side View
•
•
•
M**
N*
Z**
-
-
-
-
-
-
0.35
0.25
0.05
K
L
Z
•
•
E
All Dimensions in mm
B
N
* Dimensions D, K, L, N Repeat 4X
** Dimensions E, M, Z Repeat 2X
C
D
Z
M
D
N
A
ESD protected
Bottom View
Maximum Ratings @TA = 25°C unless otherwise specified
Characteristic
Drain-Source Voltage
Symbol
Value
20
Unit
V
VDSS
VGSS
Gate-Source Voltage
V
±10
Drain Current per element (Note 1)
Continuous
Pulsed (Note 3)
200
250
ID
mA
Total Power Dissipation (Note 1)
Pd
350
mW
Thermal Resistance, Junction to Ambient
Operating and Storage Temperature Range
357
°C/W
°C
RθJA
-65 to +150
T , TSTG
j
Notes:
1. Device mounted on FR-4 PCB.
2. No purposefully added lead.
3. Pulse width ≤10μS, Duty Cycle ≤1%.
4. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
DS30801 Rev. 6 - 2
1 of 4
DMN2005DLP4K
© Diodes Incorporated
www.diodes.com