ADVANCE
CYW43570
Single-Chip 5G WiFi IEEE 802.11ac 2×2
MAC/Baseband/Radio with Integrated
Bluetooth 4.1 and EDR
The Cypress CYW43570 is a complete dual-band (2.4 GHz and 5 GHz) 5G WiFi 2 × 2 MIMO MAC/PHY/Radio System-on-a-Chip.
This WiFi single-chip device provides a high level of integration with a dual-stream IEEE 802.11ac MAC/baseband/radio and Bluetooth
4.1 + enhanced data rate (EDR). In IEEE 802.11ac mode, the WLAN operation supports rates of MCS0–MCS9 (up to 256 QAM) in
20 MHz, 40 MHz, and 80 MHz channels for data rates up to 867 Mbps. In addition, all the IEEE 802.11a/b/g/n rates are supported.
Included on-chip are 2.4 GHz and 5 GHz transmitter power amplifiers and receiver low noise amplifiers.
The CYW43570 integrates several peripheral interfaces including USB 2.0 (Bluetooth), PCIe (Wi-Fi), and serial flash. For the
Bluetooth section, the host interface options are a high-speed 4-wire UART and USB 2.0 full-speed (12 Mbps).
The CYW43570 uses advanced design techniques and process technology to reduce active and idle power, and includes an
embedded power management unit that simplifies the system power topology.
The CYW43570 implements highly sophisticated enhanced collaborative coexistence hardware mechanisms and algorithms that
ensure that WLAN and Bluetooth collaboration is optimized for maximum performance.
This datasheet provides details on the functional, operational, and electrical characteristics for the Cypress CYW43570. It is intended
for hardware design, application, and OEM engineers.
Cypress Part Numbering Scheme
Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,
there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides
Cypress ordering part number that matches an existing IoT part number.
Table 1. Mapping Table for Part Number between Broadcom and Cypress
Broadcom Part Number
Cypress Part Number
BCM43570
BCM43570KFFBG
CYW43570
CYW43570KFFBG
Figure 1. Functional Block Diagram for PCIe (WLAN) and BT (USB 2.0) Interfaces
VIO VBAT **
XTAL
40 MHz
PCIE
WLAN
Host I/F
WL_HOST_WAKE
WL_REG_ON
T/R Switch
T/R Switch
5G WLAN
Ant1
Ant0
Diplexer
Diplexer
2G WLAN
5G WLAN
UART*
USB 2.0
I2S*
CYW43570
PCM
T/R Switch
T/R Switch
Bluetooth
Host I/F
BT_DEV_WAKE*
BT_HOST_WAKE*
BT_REG_ON
2G WLAN
BT
BT_VSYNC_IN
* Not available in the P1xx design reference board.
** VBAT is the main power supply (ranges from 3.0V to 3.6V) to the chip.
Cypress Semiconductor Corporation
Document Number: 002-15054 Rev. *I
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198 Champion Court
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San Jose, CA 95134-1709
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408-943-2600
Revised October 27, 2016