Datasheet > CYWB0124AB_09

CYWB0124AB_09

更新时间： 2024-11-18 06:51:51

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		存储控制器
页数	文件大小	规格书
2页	255K
描述
West Bridge,Antioch,USB/Mass Storage Peripheral Controller

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CYWB0124AB_09 数据手册

CYWB0124AB

West Bridge™ : Antioch™ USB/Mass

Storage Peripheral Controller

• Memory-mapped interface to main processor

• DMA slave support

1.0 Features

• SLIM™ Architecture, allowing simultaneous and

independent data paths between Processor & USB and

between USB & Mass Storage

• Ultra low-power, 1.8V core operation

• Low Power Modes

• Small footprint, 6x6mm VFBGA

• Selectable Clock Input Frequencies

— 19.2 MHz, 24 MHz, 26 MHz, 48 MHz

• High-Speed USB at 480 Mbps

— USB 2.0 compliant

— Integrated USB 2.0 transceiver, smart Serial Interface

Engine

2.0 Applications

— 16 programmable endpoints

• Mass Storage device support

— MMC/MMC+/SD

• Cellular Phones

• Portable Media Players

• Personal Digital Assistants

• Digital Cameras

— NAND flash: x8 or x16, SLC

— Full NAND management (ECC, wear-leveling)

• Portable Video Recorder

Figure 1-1. West Bridge Antioch Block Diagram

West Bridge Antioch

8051 MCU

Control Registers

Access Control

SLIM^TM

Mass Storage Interface

SD/MMC/CE-ATA

NAND

With this architecture, connecting a device using Antioch to a

PC through USB does not disturb any of the functions of the

device, which can still access Mass storage at the same time

the PC is synchronizing with the main processor.

3.0 Functional Overview

3.1The SLIM™ architecture

The Simultaneous Link to Independent Multimedia (SLIM)

architecture allows three different interfaces (the P-port, the

S-port and the U-port) to connect to one-another indepen-

dently.

The SLIM architecture enables new usage models, in which a

PC can access a Mass storage device independent of the

main processor, or enumerate access to both the mass

storage and the main processor at the same time.

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised October 24, 2006

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与CYWB0124AB_09相关器件

型号	品牌	获取价格	描述	数据表
CYWB0124AB-BVXI	CYPRESS	获取价格	West Bridge Antioch Memory-mapped interface to main processor
CYWB0124AB-BVXIT	CYPRESS	获取价格	Bus Controller, PBGA100,
CYWB0124ABX-FDXI	CYPRESS	获取价格	West Bridge Antioch Memory-mapped interface to main processor
CYWB0124ABX-FDXIT	CYPRESS	获取价格	Bus Controller, PBGA81,
CYWB0125AB-BVXI	CYPRESS	获取价格	West Bridge Antioch Memory-mapped interface to main processor
CYWB0125ABX-FDXI	CYPRESS	获取价格	West Bridge Antioch Memory-mapped interface to main processor
CYWB012X	CYPRESS	获取价格	West Bridge Antioch Memory-mapped interface to main processor
CYWB0163BB-FBXIT	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA131, 5.099 X 4.695 MM, 0.60 MM HEIGHT, 0.40 MM PITCH, WL
CYWB0216ABS-BZXI	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA121, 10 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-121
CYWB0220ABS-BZXI	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA121, 10 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-121

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