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CYWB0226ABSX-FDXIT PDF预览

CYWB0226ABSX-FDXIT

更新时间: 2024-11-18 12:21:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储控制器
页数 文件大小 规格书
78页 1534K
描述
West Bridge®: Astoria™ USB and Mass Storage Peripheral Controller

CYWB0226ABSX-FDXIT 数据手册

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CYWB022XX Family  
West Bridge®: Astoria™ USB and Mass  
Storage Peripheral Controller  
West Bridge®: Astoria™ USB and Mass Storage Peripheral Controller  
SPI (slave mode) interface  
Direct memory access (DMA) slave support  
Features  
Multimedia device support  
Up to two SD, SDIO, MMC, MMC+, and CE-ATA devices  
FlexBoot  
Processor can boot from the processor interface port  
Ultra low power, 1.8-V core operation  
Low power modes  
®
Supports Microsoft Media Transfer Protocol (MTP) with  
optimized data throughput  
Simultaneous Link to Independent Multimedia (SLIM®)  
architecture, enabling simultaneous and independent data  
paths between the processor and USB, and between the USB  
and mass storage  
Small footprint:  
3.91 × 3.91 × 0.55 mm 81-ball WLCSP (SP and Lite SP)  
6 × 6 × 1.0 mm 100-ball VFBGA  
10 × 10 × 1.20 mm 121-ball FBGA  
Supports I2C boot and processor boot  
High-speed USB at 480 Mbps  
USB 2.0 compliant  
Integrated USB switch  
Integrated USB 2.0 transceiver, smart serial interface engine  
16 programmable endpoints  
Selectable clock input frequencies  
19.2 MHz, 24 MHz, 26 MHz, and 48 MHz  
Applications  
GPIF (General Programmable Interface)  
Allows direct connection to most parallel interface  
Programmable waveform descriptors and configuration  
registers to define waveforms  
Supports multiple Ready (RDY) inputs and Control (CTL)  
outputs  
Cellular phones  
Portable media players  
Personal digital assistants  
Portable navigation devices  
Digital cameras  
Flexible processor interface that supports:  
Multiplexing and nonmultiplexing address and data interface  
SRAM interface  
POS terminals  
Pseudo cellular random access memory (CRAM) interface  
Portable video recorders  
Data cards and wireless dongles  
(Antioch interface)  
Pseudo NAND flash interface  
Logic Block Diagram  
West BridgeTM AstoriaTM  
Control  
Registers  
uC  
Access Control  
P
U
SLIMTM  
SD/SDIO/  
MMC+/ CE- N-XpressTM  
ATA Block Engine  
Cypress  
Configurable Storage  
Interface  
S
Cypress Semiconductor Corporation  
Document Number: 001-13805 Rev. *M  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised July 6, 2012  

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