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CYWT16B256-133FZQB PDF预览

CYWT16B256-133FZQB

更新时间: 2024-11-06 14:56:15
品牌 Logo 应用领域
英飞凌 - INFINEON /
页数 文件大小 规格书
153页 1175K
描述
Space Memories

CYWT16B256-133FZQB 数据手册

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CYWT16B256  
256 Mb (32 MB) 3.0 V Serial NOR Flash  
Memory  
Wide temperature range  
General description  
The CY16B family devices are Flash non-volatile memory products using:  
• Floating Gate technology  
• 65-nm process lithography  
The CY16B family connects to a host system via a serial peripheral interface (SPI). Traditional SPI single bit serial  
input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide  
Quad I/O (QIO) and quad peripheral interface (QPI) commands. In addition, there are double data rate (DDR) read  
commands for QIO and QPI that transfer address and read data on both edges of the clock.  
The architecture features a page programming buffer that allows up to 256-bytes to be programmed in one  
operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase.  
By using CY16B family devices at the higher clock rates supported, with Quad commands, the instruction read  
transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while  
reducing signal count dramatically.  
The CY16B family products offer high densities coupled with the flexibility and fast performance required by a  
variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space,  
signal connections, and power. These memories offer flexibility and performance well beyond ordinary serial  
flash devices. They are ideal for code shadowing to RAM, executing code directly (XIP), and storing  
re-programmable data.  
Features  
SPI with multi-I/O  
- Clock polarity and phase modes 0 and 3  
- DDR option  
- QPI option  
- Extended addressing: 24- or 32-bit address options  
Read  
- Commands: Normal, fast, dual I/O, quad I/O, dualO, quadO, DDR quad I/O.  
- Modes: Burst wrap, continuous (XIP), QPI  
- Serial flash discoverable parameters (SFDP) for configuration information.  
Program architecture  
- 256 bytes page programming buffer 3.0 V CYWT16B Flash memory  
- Program suspend and resume  
Erase architecture  
- Uniform 4KB sector erase  
- Uniform 32KB half block erase  
- Uniform 64KB block erase  
- Chip erase  
- Erase suspend and resume  
100,000 program/erase cycles  
20 year data retention  
Datasheet  
www.infineon.com  
Please read the Important Notice and Warnings at the end of this document  
page 1 of 153  
002-34690 Rev. **  
2022-05-25  

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