Datasheet > CYK001M16SCCAU

CYK001M16SCCAU

更新时间： 2024-11-23 23:45:51

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
10页	170K
描述
Memory

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CYK001M16SCCAU 数据手册

CYK001M16SCCAU

ADVANCE

INFORMATION



MoBL

16-Mb (1M x 16) Pseudo Static RAM

active current. This is ideal for providing More Battery Life

(MoBL) in portable applications such as cellular telephones.

The device can be put into standby mode reducing power

consumption by more than 99% when deselected using CE

LOW, CE₂HIGH or both BHE and BLE are HIGH. The

input/output pins (I/O₀through I/O₁₅) are placed in a

high-impedance state when: deselected (CE HIGH, CE₂LOW

OE is deasserted HIGH), or during a write operation (Chip

Enabled and Write Enable WE LOW). The device also has an

automatic power-down feature that significantly reduces

power consumption by 99% when addresses are not toggling

even when the chip is selected (Chip Enable CE LOW, CE₂

HIGH and both BHE and BLE are LOW). Reading from the

device is accomplished by asserting the Chip Enables (CE

LOW and CE₂HIGH) and Output Enable (OE) LOW while

forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE)

is LOW, then data from the memory location specified by the

Features

• Advanced low power MoBL^®architecture

• High speed: 70 ns

• Wide voltage range:

— V_CCrange: 2.7V to 3.3V

• Low active power

— Typical active current: 2 mA @ f = 1 MHz

— Typical active current: 13 mA @ f = f_MAX

• Low standby power

• Automatic power-down when deselected

Functional Description^[1]

The CYK001M16SCCAU is a high-performance CMOS

pseudo static RAMs (PSRAM) organized as 1 Mb words by 16

bits that supports an asynchronous memory interface. This

device features advanced circuit design to provide ultra-low

address pins will appear on I/O₀to I/O₇. If Byte High Enable

(BHE) is LOW, then data from memory will appear on I/O₈to

I/O₁₅. See the Truth Table for a complete description of read

and write modes.

Logic Block Diagram

DATA IN DRIVERS

1M x 16

RAM Array

I/O –I/O

COLUMN DECODER

BHE

BLE

Power -Down

Circuit

BHE

BLE

Note:

1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Cypress Semiconductor Corporation

Document #: 38-05426 Rev. **

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Revised January 8, 2004

12 3 4 5 6 7...10

中文翻译

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与CYK001M16SCCAU相关器件

型号	品牌	获取价格	描述	数据表
CYK001M16SCCAU-55BAI	CYPRESS	获取价格	16-Mbit (1M x 16) Pseudo Static RAM
CYK001M16SCCAU-70BAI	CYPRESS	获取价格	16-Mbit (1M x 16) Pseudo Static RAM
CYK001M16ZCCA	CYPRESS	获取价格	16-Mbit (1M x 16) Pseudo Static RAM
CYK001M16ZCCAU	ETC	获取价格	Memory
CYK001M16ZCCAU-55BAI	CYPRESS	获取价格	16-Mbit (1M x 16) Pseudo Static RAM
CYK001M16ZCCAU-55BAXI	CYPRESS	获取价格	Pseudo Static RAM, 1MX16, 55ns, CMOS, PBGA48, 6 X 8 MM, 1.20 MM HEIGHT, FBGA-48
CYK001M16ZCCAU-70BAI	CYPRESS	获取价格	16-Mbit (1M x 16) Pseudo Static RAM
CYK001M16ZCCAU-70BAXI	CYPRESS	获取价格	Pseudo Static RAM, 1MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1.20 MM HEIGHT, FBGA-48
CYK001M16ZCCAU-FVI55	CYPRESS	获取价格	Pseudo Static RAM, 1MX16, 55ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48
CYK-10R-26G	MERRIMAC	获取价格	DIRECTIONAL COUPLERS

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