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CY9C62256-70SNXC PDF预览

CY9C62256-70SNXC

更新时间: 2024-09-16 13:07:15
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赛普拉斯 - CYPRESS 存储内存集成电路静态存储器光电二极管
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CY9C62256-70SNXC 数据手册

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PRELIMINARY  
CY9C62256  
32K x 8 Magnetic Nonvolatile CMOS RAM  
Features  
Functional Description  
• 100% form, fit, function-compatible with 32K × 8  
The CY9C62256 is a high-performance CMOS nonvolatile  
RAM employing an advanced magnetic RAM (MRAM)  
process. An MRAM is nonvolatile memory that operates as a  
fast read and write RAM. It provides data retention for more  
than ten years while eliminating the reliability concerns,  
functional disadvantages and system design complexities of  
battery-backed SRAM, EEPROM, Flash and FeRAM. Its fast  
writes and high write cycle endurance makes it superior to  
other types of nonvolatile memory.  
micropower SRAM (CY62256)  
— Fast Read and Write access: 70 ns  
— Voltage range: 4.5V–5.5V operation  
— Low power: 330 mW Active; 495 µW standby  
— Easy memory expansion with CE and OE features  
— TTL-compatible inputs and outputs  
— Automatic power-down when deselected  
The CY9C62256 operates very similarly to SRAM devices.  
Memory read and write cycles require equal times. The MRAM  
memory is nonvolatile due to its unique magnetic process.  
Unlike BBSRAM, the CY9C62256 is truly a monolithic nonvol-  
atile memory. It provides the same functional benefits of a fast  
write without the serious disadvantages associated with  
modules and batteries or hybrid memory solutions.  
These capabilities make the CY9C62256 ideal for nonvolatile  
memory applications requiring frequent or rapid writes in a  
bytewide environment.  
• Replaces 32K × 8 Battery Backed (BB)SRAM, SRAM,  
EEPROM, FeRAM or Flash memory  
• Data is automatically Write protected during power loss  
• Write Cycles Endurance: > 1015 cycles  
• Data Retention: > 10 Years  
• Shielded from external magnetic fields  
• Extra 64 Bytes for device identification and tracking  
• Temperature ranges  
The CY9C62256 is offered in both commercial and industrial  
temperature ranges.  
— Commercial: 0°C to 70°C  
— Industrial: – 40°C to 85°C  
• JEDEC STD 28-pin DIP (600-mil), 28-pin (300-mil) SOIC,  
and 28-pin TSOP-1 packages. Also available in 450-mil  
wide (300-mil body width) 28-pin narrow SOIC.  
Logic Block Diagram  
Pin Configurations  
SOIC/DIP  
Top View  
A
28  
V
CC  
1
5
27 WE  
A
2
6
A
26  
A
3
7
4
A
A
4
25  
3
8
9
24  
A
A
5
2
A
10  
A
11  
A
12  
A
13  
A
14  
23  
22  
A
6
1
OE  
7
A
0
21  
20  
19  
18  
17  
8
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
0
1
2
3
4
5
6
CE  
I/O  
9
INPUTBUFFER  
10  
11  
12  
13  
14  
7
I/O  
I/O  
A
I/O  
I/O  
I/O  
6
5
4
3
11  
0
1
2
A
10  
A
16 I/O  
9
Silicon Sig.  
I/O  
GND  
15  
A
8
A
7
512x512  
ARRAY  
A
6
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
8
A
OE  
22  
23  
0
A
3
2
1
A
1
CE  
A
I/O  
A
2
24  
25  
26  
27  
28  
1
2
3
4
5
7
A
I/O  
I/O  
I/O  
I/O  
A
3
6
5
4
3
A
4
TSOP I  
WE  
CE  
POWER  
DOWN &  
WRITE  
Top View  
V
WE  
CC  
COLUMN  
GND  
A
5
(not to scale)  
DECODER  
I/O  
2
PROTECT  
A
6
I/O  
7
OE  
I/O  
1
A7  
I/O  
0
A
8
A
A
14  
9
A
A
A
13  
6
7
10  
11  
A
12  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-15001 Rev. *E  
Revised November 15, 2004  

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