Datasheet > CY8C21434-24PVXIT

CY8C21434-24PVXIT

更新时间： 2024-09-16 20:45:03

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		微控制器光电二极管
页数	文件大小	规格书
34页	589K
描述
Microcontroller, 8-Bit, FLASH, M8C CPU, 24MHz, CMOS, PDSO28,

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技术参数
数据手册

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CY8C21434-24PVXIT 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	风险等级：	5.8
位大小：	8	CPU系列：	M8C
JESD-30 代码：	R-PDSO-G28	JESD-609代码：	e3
湿度敏感等级：	3	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP28,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	电源：	2.5/5 V
认证状态：	Not Qualified	RAM（字节）：	512
ROM（单词）：	8192	ROM可编程性：	FLASH
速度：	24 MHz	子类别：	Microcontrollers
最大压摆率：	4 mA	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	DUAL
Base Number Matches：	1

CY8C21434-24PVXIT 数据手册

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PSoC™ Mixed-Signal Array

Preliminary Data Sheet

CY8C21234,

CY8C21334, and CY8C21434

Features

■ Powerful Harvard Architecture Processor

■ M8C Processor Speeds to 24 MHz

■ Low Power at High Speed

■ Flexible On-Chip Memory

■ Programmable Pin Configurations

■ 25 mA Drive on All GPIO

■ 8 Kbytes Flash Program Storage 50,000

Erase/Write Cycles

■ Pull Up, Pull Down, High Z, Strong, or Open

■ 512 Bytes SRAM Data Storage

■ In-System Serial Programming (ISSP™)

■ Partial Flash Updates

Drain Drive Modes on All GPIO

■ 2.4V to 5.25V Operating Voltage

■ Up to 8 Analog Inputs on GPIO

■ Configurable Interrupt on All GPIO

■ Versatile Analog Mux

■ Operating Voltages Down to 1.0V Using

On-Chip Switch Mode Pump (SMP)

■ Industrial Temperature Range: -40°C to +85°C

■ Flexible Protection Modes

■ EEPROM Emulation in Flash

■ Common Internal Analog Bus

■ Advanced Peripherals (PSoC Blocks)

■ 4 Analog Type “E” PSoC Blocks Provide:

■ Simultaneous Connection of IO Combinations

■ Capacitive Sensing Application Capability

■ Additional System Resources

■ Complete Development Tools

■ Free Development Software

- 2 Comparators with DAC Refs

- Dual 8-Bit 8:1 ADC

■ 4 Digital PSoC Blocks Provide:

(PSoC™ Designer)

■ Full-Featured, In-Circuit Emulator and

■ I2C™ Master, Slave and MultiMaster to

Programmer

400 kHz

- 8- to 32-Bit Timers, Counters, and PWMs

- CRC and PRS Modules

■ Full Speed Emulation

■ Watchdog and Sleep Timers

■ Complex Breakpoint Structure

■ 128 Kbytes Trace Memory

■ User-Configurable Low Voltage Detection

■ Integrated Supervisory Circuit

- Full-Duplex UART, SPI™ Master or Slave

- Connectable to All GPIO Pins

■ Complex Peripherals by Combining Blocks

■ Precision, Programmable Clocking

■ Internal ±2.5% 24/48 MHz Oscillator

■ Internal Oscillator for Watchdog and Sleep

■ On-Chip Precision Voltage Reference

PSoC™ Functional Overview

Port 3 Port 2 Port 1 Port 0

PSoC

CORE

The PSoC™ family consists of many Mixed-Signal Array with

On-Chip Controller devices. These devices are designed to

replace multiple traditional MCU-based system components

with one, low cost single-chip programmable component. A

PSoC device includes configurable blocks of analog and digital

logic, as well as programmable interconnect. This architecture

allows the user to create customized peripheral configurations,

to match the requirements of each individual application. Addi-

tionally, a fast CPU, Flash program memory, SRAM data mem-

ory, and configurable IO are included in a range of convenient

pinouts.

System Bus

Global Digital Interconnect

Global Analog Interconnect

Flash

CPU Core

SROM

SRAM

Sleep and

Watchdog

Interrupt

Controller

(M8C)

Clock Sources

The PSoC architecture, as illustrated on the left, is comprised of

four main areas: the Core, the System Resources, the Digital

System, and the Analog System. Configurable global bus

resources allow all the device resources to be combined into a

complete custom system. Each PSoC device includes four digi-

tal blocks and four analog blocks. Depending on the PSoC

package, up to 28 general purpose IO (GPIO) are also

included. The GPIO provide access to the global digital and

analog interconnects.

(Includes IMO and ILO)

ANALOG SYSTEM

DIGITAL SYSTEM

Digital

Analog

Ref

Analog

PSoC

Block

Array

PSoC

Block Array

The PSoC Core

The PSoC Core is a powerful engine that supports a rich

instruction set. It encompasses SRAM for data storage, an

interrupt controller, sleep and watchdog timers, and IMO (inter-

nal main oscillator) and ILO (internal low speed oscillator). The

POR and LVD

System Resets

Internal

Voltage

Ref.

Digital

Clocks

Analog

Mux

I2C

SYSTEM RESOURCES

June 2004

12 3 4 5 6 7...34

中文翻译

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与CY8C21434-24PVXIT相关器件

型号	品牌	获取价格	描述	数据表
CY8C21434-24PX	CYPRESS	获取价格	PSoC Mixed-Signal Array
CY8C21434-24SX	CYPRESS	获取价格	PSoC Mixed-Signal Array
CY8C21434B	CYPRESS	获取价格	PSoC Programmable System-on-Chip Low power at high speed
CY8C21434B-24LCXI	CYPRESS	获取价格	Multifunction Peripheral, CMOS, 5 X 5 MM 0.40 MM HEIGHT, LEAD FREE, MO-220, QFN-32
CY8C21434B-24LCXIT	CYPRESS	获取价格	Multifunction Peripheral, CMOS, 5 X 5 MM 0.40 MM HEIGHT, LEAD FREE, MO-220, QFN-32
CY8C21434B-24LTXI	CYPRESS	获取价格	Multifunction Peripheral, CMOS, QFN-32
CY8C21434B-24LTXI	INFINEON	获取价格	CY8C21x34
CY8C21512-12PVXE	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO28, 0.210 INCH, LEAD FREE, SSOP-28
CY8C21512-24PVXA	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO28, SSOP-28
CY8C21512-24PVXAT	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO28, SSOP-28

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