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CY8C21534-24PVXIT PDF预览

CY8C21534-24PVXIT

更新时间： 2024-09-16 03:18:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 多功能外围设备微控制器和处理器外围集成电路光电二极管时钟
页数 文件大小 规格书
42页 564K
描述
PSoC㈢ Mixed-Signal Array

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CY8C21534-24PVXIT 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP-28针数：28
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：0.77
Is Samacsys：N其他特性：ALSO OPERATES AT 3.3V SUPPLY
边界扫描：NO总线兼容性：I2C; IRDA; SPI; UART; USB
最大时钟频率：24.6 MHzJESD-30 代码：R-PDSO-G28
JESD-609代码：e3长度：10.2 mm
湿度敏感等级：3I/O 线路数量：24
端子数量：28最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP28,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
认证状态：Not QualifiedRAM（字数）：512
座面最大高度：2 mm最大压摆率：4 mA
最大供电电压：5.25 V最小供电电压：2.4 V
标称供电电压：2.7 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：5.3 mmuPs/uCs/外围集成电路类型：MULTIFUNCTION PERIPHERAL
Base Number Matches：1

CY8C21534-24PVXIT 数据手册

 浏览型号CY8C21534-24PVXIT的Datasheet PDF文件第2页浏览型号CY8C21534-24PVXIT的Datasheet PDF文件第3页浏览型号CY8C21534-24PVXIT的Datasheet PDF文件第4页浏览型号CY8C21534-24PVXIT的Datasheet PDF文件第5页浏览型号CY8C21534-24PVXIT的Datasheet PDF文件第6页浏览型号CY8C21534-24PVXIT的Datasheet PDF文件第7页 
PSoC® Mixed-Signal Array  
Final Data Sheet  
CY8C21234, CY8C21334,  
CY8C21434, CY8C21534, and CY8C21634  
Features  
■
Powerful Harvard Architecture Processor  
■
Flexible On-Chip Memory  
■
Programmable Pin Configurations  
❐
❐
❐
❐
M8C Processor Speeds to 24 MHz  
Low Power at High Speed  
❐
8K Flash Program Storage 50,000 Erase/Write  
Cycles  
❐
❐
25 mA Drive on All GPIO  
Pull Up, Pull Down, High Z, Strong, or Open  
Drain Drive Modes on All GPIO  
❐
❐
❐
❐
❐
512 Bytes SRAM Data Storage  
In-System Serial Programming (ISSP™)  
Partial Flash Updates  
2.4V to 5.25V Operating Voltage  
❐
❐
Up to 8 Analog Inputs on GPIO  
Operating Voltages Down to 1.0V Using  
On-Chip Switch Mode Pump (SMP)  
Configurable Interrupt on All GPIO  
❐
Industrial Temperature Range: -40°C to +85°C  
Flexible Protection Modes  
■
■
Versatile Analog Mux  
EEPROM Emulation in Flash  
❐
❐
❐
Common Internal Analog Bus  
■
Advanced Peripherals (PSoC Blocks)  
Simultaneous Connection of IO Combinations  
Capacitive Sensing Application Capability  
■
Complete Development Tools  
❐
4 Analog Type “E” PSoC Blocks Provide:  
- 2 Comparators with DAC Refs  
❐
Free Development Software  
(PSoC Designer™)  
Additional System Resources  
- Single or Dual 8-Bit 28 Channel ADC  
4 Digital PSoC Blocks Provide:  
❐
Full-Featured, In-Circuit Emulator and  
Programmer  
2
❐
❐
I C™ Master, Slave and Multi-Master to  
400 kHz  
- 8- to 32-Bit Timers, Counters, and PWMs  
- CRC and PRS Modules  
❐
❐
❐
Full Speed Emulation  
❐
❐
❐
❐
Watchdog and Sleep Timers  
Complex Breakpoint Structure  
128K Trace Memory  
User-Configurable Low Voltage Detection  
Integrated Supervisory Circuit  
- Full-Duplex UART, SPI™ Master or Slave  
- Connectable to All GPIO Pins  
Complex Peripherals by Combining Blocks  
■
Precision, Programmable Clocking  
On-Chip Precision Voltage Reference  
❐
❐
❐
Internal ±2.5% 24/48 MHz Oscillator  
Internal Oscillator for Watchdog and Sleep  
PSoC® Functional Overview  
The PSoC® family consists of many Mixed-Signal Array with  
On-Chip Controller devices. These devices are designed to  
replace multiple traditional MCU-based system components  
with one, low cost single-chip programmable component. A  
PSoC device includes configurable blocks of analog and digital  
logic, as well as programmable interconnect. This architecture  
allows the user to create customized peripheral configurations,  
to match the requirements of each individual application. Addi-  
tionally, a fast CPU, Flash program memory, SRAM data mem-  
ory, and configurable IO are included in a range of convenient  
pinouts.  
The PSoC architecture, as illustrated on the left, is comprised of  
four main areas: the Core, the System Resources, the Digital  
System, and the Analog System. Configurable global bus  
resources allow all the device resources to be combined into a  
complete custom system. Each CY8C21x34 PSoC device  
includes four digital blocks and four analog blocks. Depending  
on the PSoC package, up to 28 general purpose IO (GPIO) are  
also included. The GPIO provide access to the global digital  
and analog interconnects.  
The PSoC Core  
The PSoC Core is a powerful engine that supports a rich  
instruction set. It encompasses SRAM for data storage, an  
interrupt controller, sleep and watchdog timers, and IMO (inter-  
nal main oscillator) and ILO (internal low speed oscillator). The  
January 12, 2007  
© Cypress Semiconductor Corp. 2004-2007 — Document No. 38-12025 Rev. *K  
1
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CY8C21534-24PVXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY8C21534-24PVXI CYPRESS

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 PSoC㈢ Mixed-Signal Array

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