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CY8C21534B-24PVXIT PDF预览

CY8C21534B-24PVXIT

更新时间: 2024-11-07 14:56:11
品牌 Logo 应用领域
英飞凌 - INFINEON /
页数 文件大小 规格书
52页 894K
描述
CY8C21x34

CY8C21534B-24PVXIT 数据手册

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CY8C21x34B  
®
PSoC Programmable System-on-Chip™  
®
CapSense Controller with SmartSense™  
Auto-tuning1–21Buttons, 0–4Sliders, Proximity  
PSoC® Programmable System-on-Chip™ CapSense® Controller with SmartSense™ Auto-tuning 1–21 Buttons, 0–4 Sliders, Proximity  
Flexible on-chip memory  
8-KB Flash /512-B SRAM  
50,000 erase/write cycles  
In-system serial programming (ISSP)  
Partial flash updates  
Features  
Advanced CapSense® block with SmartSense™ Auto-Tuning  
Patented CSD sensing algorithm  
SmartSense_EMC Auto-Tuning  
• Sets and maintains optimal sensor performance during run  
time  
Flexible protection modes  
EEPROM emulation in flash  
• Eliminates system tuning during development and  
production  
• Compensates for variations in manufacturing process  
Complete development tools  
Free development software (PSoC Designer™)  
Full-featured, in-circuit emulator (ICE) and programmer  
Full-speed emulation  
Driven shield  
Delivers best-in class water tolerant designs  
Robust proximity sensing in the presence of metal objects  
Supports longer trace lengths  
Complex breakpoint structure  
128-KB trace memory  
Precision, programmable clocking  
Internal ±2.5% 24- / 48-MHz main oscillator[1]  
Internal oscillator for watchdog and sleep  
Powerful Harvard-architecture processor  
M8C processor speeds up to 24 MHz  
Low power at high speed  
Operating voltage: 2.4 V to 5.25 V  
Operating voltages down to 1.0 V using on-chip switch mode  
pump (SMP)  
Programmable pin configurations  
25-mA sink, 10-mA source on all GPIOs  
Pull-up, pull-down, high-Z, strong, or open-draindrivemodes  
on all GPIOs  
Up to eight analog inputs on GPIOs  
Configurable interrupt on all GPIOs  
Industrial temperature range: -40 °C to 85 °C  
Advanced peripherals (PSoC® blocks)  
Four analog Type E PSoC blocks provide:  
• Two comparators with digital-to-analog converter (DAC)  
references  
• Single or dual 10-bit 28 channel analog-to-digital  
converters (ADC)  
Versatile analog mux  
Common internal analog bus  
Simultaneous connection of I/O combinations  
Capacitive sensing application capability  
Additional system resources  
I2C[2] master, slave, and multi-master to 400 kHz  
Watchdog and sleep timers  
Four digital PSoC blocks provide:  
• 8- to 32-bit timers, counters, and pulse width modulators  
(PWMs)  
User-configurable low-voltage detection (LVD)  
Integrated supervisory circuit  
• Cyclical redundancy check (CRC) and pseudo random  
sequence (PRS) modules  
On-chip precision voltage reference  
• Full-duplex universal asynchronous receiver transmitter  
(UART), serial peripheral interface (SPI) master or slave  
• Connectable to all general purpose I/O (GPIO) pins  
Implement a combination up to 21 buttons or 4 sliders using  
4 analog blocks and 3 digital blocks  
Package options  
16-pin SOIC  
20-pin, 28-pin, 56-pin SSOP  
32-pin QFN  
Complex peripherals by combining blocks  
Errata: For information on silicon errata, see “Errata” on page 48. Details include trigger conditions, devices affected, and proposed workaround.  
Notes  
1. Errata: The worst case IMO frequency deviation when operated below 0 °C and above +70 °C and within the upper and lower datasheet temperature range is ±5%.  
2
2
2. Errata: The I C block exhibits occasional data and bus corruption errors when the I C master initiates transactions while the device is transitioning in to or out of sleep  
mode.  
Cypress Semiconductor Corporation  
Document Number: 001-67345 Rev. *H  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 3, 2018  

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