生命周期: | Obsolete | 零件包装代码: | LCC |
包装说明: | QCCJ, | 针数: | 52 |
Reach Compliance Code: | unknown | ECCN代码: | 3A991.B.2.A |
HTS代码: | 8542.32.00.41 | 风险等级: | 5.8 |
最长访问时间: | 8.5 ns | 其他特性: | TWO BIT WRAPAROUND COUNTER |
JESD-30 代码: | S-PQCC-J52 | JESD-609代码: | e0 |
长度: | 19.1262 mm | 内存密度: | 1179648 bit |
内存集成电路类型: | CACHE SRAM | 内存宽度: | 18 |
功能数量: | 1 | 端口数量: | 1 |
端子数量: | 52 | 字数: | 65536 words |
字数代码: | 64000 | 工作模式: | SYNCHRONOUS |
最高工作温度: | 70 °C | 最低工作温度: | |
组织: | 64KX18 | 输出特性: | 3-STATE |
可输出: | YES | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | QCCJ | 封装形状: | SQUARE |
封装形式: | CHIP CARRIER | 并行/串行: | PARALLEL |
认证状态: | Not Qualified | 座面最大高度: | 5.08 mm |
最大供电电压 (Vsup): | 3.6 V | 最小供电电压 (Vsup): | 3 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | COMMERCIAL |
端子面层: | TIN LEAD | 端子形式: | J BEND |
端子节距: | 1.27 mm | 端子位置: | QUAD |
宽度: | 19.1262 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CY7C1332-8JCT | CYPRESS |
获取价格 |
Cache SRAM, 64KX18, 8.5ns, CMOS, PQCC52, PLASTIC, LCC-52 | |
CY7C1332-8NC | ETC |
获取价格 |
x18 Fast Synchronous SRAM | |
CY7C1332AV25 | CYPRESS |
获取价格 |
18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write | |
CY7C1332AV25-200BGC | CYPRESS |
获取价格 |
18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write | |
CY7C1332AV25-200BGXC | CYPRESS |
获取价格 |
18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write | |
CY7C1332AV25-250BGC | CYPRESS |
获取价格 |
18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write | |
CY7C1332AV25-250BGXC | CYPRESS |
获取价格 |
18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write | |
CY7C1333 | CYPRESS |
获取价格 |
64Kx32 Flow-Thru SRAM with NoBL⑩ Architecture | |
CY7C1333-50AC | CYPRESS |
获取价格 |
64Kx32 Flow-Thru SRAM with NoBL⑩ Architecture | |
CY7C133-35JC | CYPRESS |
获取价格 |
2K x 16 Dual-Port Static RAM |