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CY7C1021BN-15VXCT PDF预览

CY7C1021BN-15VXCT

更新时间： 2024-11-29 19:56:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 466K
描述
Standard SRAM, 64KX16, 15ns, CMOS, PDSO44, 0.400 INCH, LEAD FREE, SOJ-44

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CY7C1021BN-15VXCT 技术参数

生命周期：Obsolete零件包装代码：SOJ
包装说明：SOJ,针数：44
Reach Compliance Code：unknownECCN代码：3A991.B.2.B
HTS代码：8542.32.00.41风险等级：5.34
最长访问时间：15 nsJESD-30 代码：R-PDSO-J44
JESD-609代码：e4长度：28.575 mm
内存密度：1048576 bit内存集成电路类型：STANDARD SRAM
内存宽度：16功能数量：1
端子数量：44字数：65536 words
字数代码：64000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：64KX16封装主体材料：PLASTIC/EPOXY
封装代码：SOJ封装形状：RECTANGULAR
封装形式：SMALL OUTLINE并行/串行：PARALLEL
认证状态：Not Qualified座面最大高度：3.7592 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：J BEND
端子节距：1.27 mm端子位置：DUAL
宽度：10.16 mmBase Number Matches：1

CY7C1021BN-15VXCT 数据手册

 浏览型号CY7C1021BN-15VXCT的Datasheet PDF文件第2页浏览型号CY7C1021BN-15VXCT的Datasheet PDF文件第3页浏览型号CY7C1021BN-15VXCT的Datasheet PDF文件第4页浏览型号CY7C1021BN-15VXCT的Datasheet PDF文件第5页浏览型号CY7C1021BN-15VXCT的Datasheet PDF文件第6页浏览型号CY7C1021BN-15VXCT的Datasheet PDF文件第7页 
CY7C1021BN  
CY7C10211BN  
1-Mbit (64K x 16) Static RAM  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is  
written into the location specified on the address pins (A0  
through A15). If Byte High Enable (BHE) is LOW, then data  
from I/O pins (I/O9 through I/O16) is written into the location  
specified on the address pins (A0 through A15).  
Features  
• Temperature Ranges  
— Commercial: 0°C to 70°C  
— Industrial: –40°C to 85°C  
— Automotive-A: –40°C to 85°C  
— Automotive-E: –40°C to 125°C  
• High speed  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing the  
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,  
then data from the memory location specified by the address  
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is  
LOW, then data from memory will appear on I/O9 to I/O16. See  
the truth table at the back of this data sheet for a complete  
description of read and write modes.  
— tAA = 10 ns (Commercial)  
— tAA = 15 ns (Automotive)  
• CMOS for optimum speed/power  
• Low active power  
The input/output pins (I/O1 through I/O16) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE  
are disabled (BHE, BLE HIGH), or during a write operation (CE  
LOW, and WE LOW).  
— 825 mW (max.)  
• Automatic power-down when deselected  
• Independent control of upper and lower bits  
• Available in Pb free and non Pb free 44-pin TSOP II and  
44-pin 400-mil-wide SOJ  
The CY7C1021BN/CY7C10211BN is available in standard  
44-pin TSOP Type II and 44-pin 400-mil-wide SOJ packages.  
Customers should use part number CY7C10211BN when  
ordering parts with 10 ns tAA, and CY7C1021BN when  
Functional Description[1]  
The CY7C1021BN/CY7C10211BN is a high-performance  
CMOS static RAM organized as 65,536 words by 16 bits. This  
device has an automatic power-down feature that significantly  
reduces power consumption when deselected.  
ordering 12 ns and 15 ns tAA  
.
Logic Block Diagram  
PinConfigurations  
DATA IN  
DRIVERS  
SOJ / TSOP II  
Top View  
44  
1
A
4
A
5
43  
42  
41  
40  
39  
38  
A
A
2
3
4
5
6
3
6
A
A
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
2
7
OE  
A
1
BHE  
BLE  
I/O  
I/O  
I/O  
A
0
64K x 16  
CE  
I/O1–I/O8  
RAM Array  
512 X 2048  
I/O  
7
1
16  
37  
36  
35  
34  
33  
I/O  
I/O  
8
2
3
15  
14  
13  
I/O9–I/O16  
9
10  
11  
12  
13  
I/O  
V
SS  
I/O  
4
CC  
V
SS  
V
V
CC  
32  
I/O  
I/O  
I/O  
5
6
7
8
12  
11  
31  
30  
29  
28  
I/O  
I/O  
I/O  
14  
15  
16  
I/O  
I/O  
10  
9
COLUMN DECODER  
WE 17  
NC  
18  
27  
26  
25  
A
A
8
15  
BHE  
19  
A
A
14  
9
WE  
A
13  
20  
21  
22  
A
11  
10  
CE  
A
A
12  
24  
23  
OE  
NC  
NC  
BLE  
Note:  
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com  
Cypress Semiconductor Corporation  
Document #: 001-06494 Rev. *A  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised September 28, 2006  
[+] Feedback  
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CY7C1021BN-15VXCT 替代型号

型号 品牌 替代类型 描述 数据表
CY7C1021D-10VXI CYPRESS

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