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CY7C09369V-12AI PDF预览

CY7C09369V-12AI

更新时间: 2024-01-29 08:35:01
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟静态存储器内存集成电路
页数 文件大小 规格书
16页 526K
描述
Dual-Port SRAM, 16KX18, 12ns, CMOS, PQFP100, PLASTIC, TQFP-100

CY7C09369V-12AI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:PLASTIC, TQFP-100
针数:100Reach Compliance Code:not_compliant
ECCN代码:3A991.B.2.BHTS代码:8542.32.00.41
风险等级:5.52最长访问时间:12 ns
最大时钟频率 (fCLK):50 MHzI/O 类型:COMMON
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
内存密度:294912 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:18功能数量:1
端口数量:2端子数量:100
字数:16384 words字数代码:16000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:16KX18
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified最大待机电流:0.0001 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.25 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

CY7C09369V-12AI 数据手册

 浏览型号CY7C09369V-12AI的Datasheet PDF文件第1页浏览型号CY7C09369V-12AI的Datasheet PDF文件第2页浏览型号CY7C09369V-12AI的Datasheet PDF文件第3页浏览型号CY7C09369V-12AI的Datasheet PDF文件第5页浏览型号CY7C09369V-12AI的Datasheet PDF文件第6页浏览型号CY7C09369V-12AI的Datasheet PDF文件第7页 
CY7C09269V/79V/89V  
CY7C09369V/79V/89V  
PRELIMINARY  
Pin Definitions  
Left Port  
–A  
Right Port  
A –A  
0R  
Description  
Address Inputs (A –A for 32K, A –A for 16K devices).  
A
0L  
15L  
15R  
0
14  
0
13  
ADS  
ADS  
Address Strobe Input. Used as an address qualifier. This signal should be asserted LOW to  
access the part using an externally supplied address. Asserting this signal LOW also loads the  
burst counter with the address present on the address pins.  
L
R
CE ,CE  
CE ,CE  
Chip Enable Input. To select either the left or right port, both CE AND CE must be asserted  
0 1  
0L  
1L  
0R  
1R  
to their active states (CE V and CE V ).  
0
IL  
1
IH  
CLK  
CLK  
Clock Signal. This input can be free running or strobed. Maximum clock input rate is f  
.
L
R
MAX  
CNTEN  
CNTEN  
Counter Enable Input. Asserting this signal LOW increments the burst address counter of its  
respective port on each rising edge of CLK. CNTEN is disabled if ADS or CNTRST are asserted  
LOW.  
L
R
CNTRST  
CNTRST  
Counter Reset Input. Asserting this signal LOW resets the burst address counter of its respec-  
tive port to zero. CNTRST is not disabled by asserting ADS or CNTEN.  
L
R
I/O –I/O  
I/O –I/O  
Data Bus Input/Output (I/O –I/O for x16 devices).  
0 15  
0L  
17L  
0R  
17R  
LB  
LB  
Lower Byte Select Input. Asserting this signal LOW enables read and write operations to the  
lower byte. (I/O –I/O for x18, I/O –I/O for x16) of the memory array. For read operations both  
L
R
0
8
0
7
the LB and OE signals must be asserted to drive output data on the lower byte of the data pins.  
UB  
UB  
R
Upper Byte Select Input. Same function as LB, but to the upper byte (I/O –I/O ).  
L
8/9L  
15/17L  
OE  
OE  
Output Enable Input. This signal must be asserted LOW to enable the I/O data pins during read  
operations.  
L
R
R/W  
R/W  
Read/Write Enable Input. This signal is asserted LOW to write to the dual port memory array.  
For read operations, assert this pin HIGH.  
L
R
FT/PIPE  
FT/PIPE  
Flow-Through/Pipelined Select Input. For flow-through mode operation, assert this pin LOW.  
For pipelined mode operation, assert this pin HIGH.  
L
R
GND  
NC  
Ground Input.  
No Connect.  
Power Input.  
V
CC  
Output Current into Outputs (LOW)............................. 20 mA  
Static Discharge Voltage ........................................... >1100V  
Maximum Ratings  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Latch-Up Current...................................................... >200mA  
Storage Temperature ................................. –65°C to +150°C  
Ambient Temperature with  
Power Applied.............................................–55°C to +125°C  
Operating Range  
Ambient  
Supply Voltage to Ground Potential ............... –0.5V to +4.6V  
Range  
Commercial  
Industrial  
Temperature  
0°C to +70°C  
–40°C to +85°C  
V
CC  
DC Voltage Applied to  
3.3V ± 300 mV  
3.3V ± 300 mV  
Outputs in High Z State ...........................–0.5V to V +0.5V  
CC  
DC Input Voltage......................................–0.5V to V +0.5V  
CC  
Shaded area contains advance information.  
4

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