5秒后页面跳转
CY7C09349AV-12AXC PDF预览

CY7C09349AV-12AXC

更新时间: 2024-11-09 12:50:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
20页 351K
描述
3.3 V 4 K/8 K × 18 Synchronous Dual Port Static RAM

CY7C09349AV-12AXC 数据手册

 浏览型号CY7C09349AV-12AXC的Datasheet PDF文件第2页浏览型号CY7C09349AV-12AXC的Datasheet PDF文件第3页浏览型号CY7C09349AV-12AXC的Datasheet PDF文件第4页浏览型号CY7C09349AV-12AXC的Datasheet PDF文件第5页浏览型号CY7C09349AV-12AXC的Datasheet PDF文件第6页浏览型号CY7C09349AV-12AXC的Datasheet PDF文件第7页 
CY7C09359AV3.3  
V 4 K/8 K × 18  
Synchronous Dual Port Static RAM  
CY7C09349AV  
CY7C09359AV  
3.3 V 4 K/8 K × 18  
Synchronous Dual Port Static RAM  
3.3  
V 4 K/8 K × 18 Synchronous Dual Port Static RAM  
High-speed clock to data access 9 and 12 ns (max)  
Features  
3.3 V low operating power  
Active = 135 mA (typical)  
Standby = 10 µA (typical)  
True dual ported memory cells which allow simultaneous  
access of the same memory location  
Two flow-through/pipelined devices  
4 K × 18 organization (CY7C09349AV)  
8 K × 18 organization (CY7C09359AV)  
Fully synchronous interface for easier operation  
Burst counters increment addresses internally  
Shorten cycle times  
Minimize bus noise  
Three modes  
Flow-through  
Pipelined  
Burst  
Supported in flow-through and pipelined modes  
Dual chip enables for easy depth expansion  
Upper and lower byte controls for bus matching  
Automatic power-down  
Pipelined output mode on both ports allows fast 67-MHz  
operation  
0.35-micron complementary metal oxide semiconductor  
(CMOS) for optimum speed/power  
Available in 100-pin thin quad flat pack (TQFP)  
Logic Block Diagram  
R/WL  
UBL  
R/WR  
UBR  
CE0L  
CE0R  
1
1
CE1L  
LBL  
CE1R  
LBR  
0
0
0/1  
0/1  
OEL  
OER  
1b 0b 1a 0a  
0a 1a 0b 1b  
0/1  
0/1  
b
a
a
b
FT/PipeL  
FT/PipeR  
9
9
9
9
I/O9L–I/O17L  
I/O9R–I/O17R  
I/O  
Control  
I/O  
Control  
I/O0L–I/O8L  
I/O0R–I/O8R  
12/13  
12/13  
[1]  
[1]  
A0L–A  
A0R–A11/12R  
11/12L  
Counter/  
Address  
Register  
Decode  
Counter/  
Address  
Register  
Decode  
CLKL  
ADSL  
CLKR  
ADSR  
True Dual Ported  
RAM Array  
CNTENL  
CNTENR  
CNTRSTR  
CNTRSTL  
Note  
1. A –A for 4 K; A –A for 8 K devices.  
0
11  
0
12  
Cypress Semiconductor Corporation  
Document Number: 001-63888 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised September 28, 2011  

CY7C09349AV-12AXC 替代型号

型号 品牌 替代类型 描述 数据表
CY7C09349AV-9AXC CYPRESS

类似代替

3.3 V 4 K/8 K × 18 Synchronous Dual Port Sta
CY7C09349AV-12AC CYPRESS

类似代替

3.3V 4K/8K x 18 Synchronous Dual-Port Static RAM
IDT70V34S25PFG8 IDT

功能相似

Dual-Port SRAM, 4KX18, 25ns, CMOS, PQFP100, POWER, PLASTIC, TQFP-100

与CY7C09349AV-12AXC相关器件

型号 品牌 获取价格 描述 数据表
CY7C09349AV-12AXCT CYPRESS

获取价格

Dual-Port SRAM, 4KX18, 12ns, CMOS, PQFP100, LEAD FREE, PLASTIC, TQFP-100
CY7C09349AV-9AC CYPRESS

获取价格

3.3V 4K/8K x 18 Synchronous Dual-Port Static RAM
CY7C09349AV-9AXC CYPRESS

获取价格

3.3 V 4 K/8 K × 18 Synchronous Dual Port Sta
CY7C09349V-10AC CYPRESS

获取价格

Multi-Port SRAM, 8KX9, 10ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C09349V-9AC CYPRESS

获取价格

Dual-Port SRAM, 4KX18, 9ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C09359-10AC CYPRESS

获取价格

Dual-Port SRAM, 16KX9, 10ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C09359-6AC CYPRESS

获取价格

Dual-Port SRAM, 8KX18, 6.5ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C09359-8AC CYPRESS

获取价格

Dual-Port SRAM, 16KX9, 8ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C09359-8AI CYPRESS

获取价格

Dual-Port SRAM, 16KX9, 8ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C09359A CYPRESS

获取价格

4K/8K x 18 Synchronous Dual-Port Static RAM