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CY7C016A-20AC PDF预览

CY7C016A-20AC

更新时间: 2024-11-07 00:01:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
20页 422K
描述
32K/16K x8, 32K/16K x9 Dual-Port Static RAM

CY7C016A-20AC 数据手册

 浏览型号CY7C016A-20AC的Datasheet PDF文件第2页浏览型号CY7C016A-20AC的Datasheet PDF文件第3页浏览型号CY7C016A-20AC的Datasheet PDF文件第4页浏览型号CY7C016A-20AC的Datasheet PDF文件第5页浏览型号CY7C016A-20AC的Datasheet PDF文件第6页浏览型号CY7C016A-20AC的Datasheet PDF文件第7页 
CY7C006A  
CY7C007A  
CY7C017A32K/16K  
x 8, 32K x 9  
Dual-Port Static RAM  
CY7C006A/CY7C007A  
CY7C016A/CY7C017A  
32K/16K x8, 32K/16K x9  
Dual-Port Static RAM  
Features  
• True dual-ported memory cells which allow  
• Automatic power-down  
• Expandable data bus to 16/18 bits or more using  
Master/Slave chip select when using more than one  
device  
simultaneous access of the same memory location  
• 16K x 8 organization (CY7C006A)  
• 32K x 8 organization (CY7C007A)  
• 16K x 9 organization (CY7C016A)  
• 32K x 9 organization (CY7C017A)  
• 0.35-micron CMOS for optimum speed/power  
• High-speed access: 12[1]/15/20 ns  
• Low operating power  
— Active: ICC = 180 mA (typical)  
— Standby: ISB3 = 0.05 mA (typical)  
• Fully asynchronous operation  
• On-chip arbitration logic  
• Semaphores included to permit software handshaking  
between ports  
• INT flags for port-to-port communication  
• Pin select for Master or Slave  
• Commercial temperature range  
• Available in 68-pin PLCC (CY7C006A, CY7C007A and  
CY7C017A), 64-pin TQFP (CY7C006A), and in 80-pin  
TQFP (CY7C007A and CY7C016A)  
Logic Block Diagram  
R/WL  
R/WR  
CER  
CEL  
OEL  
OER  
8/9  
[2]  
I/O0L–I/O7/8L  
8/9  
[2]  
I/O0R–I/O7/8R  
I/O  
I/O  
Control  
Control  
14/15  
14/15  
Address  
Decode  
Address  
Decode  
True Dual-Ported  
[4]  
[4]  
A0L–A13/14L  
A0R–A13/14R  
RAM Array  
14/15  
14/15  
[4]  
[4]  
A0L–A13/14L  
CEL  
OEL  
R/WL  
A0R–A13/14R  
CER  
Interrupt  
Semaphore  
Arbitration  
OER  
R/WR  
SEML  
BUSYL  
INTL  
SEMR  
[3]  
[3] BUSYR  
INTR  
M/S  
For the most recent information, visit the Cypress web site at www.cypress.com  
Notes:  
1. See page 7 for Load Conditions.  
2. I/O –I/O for x8 devices; I/O –I/O for x9 devices.  
0
7
0
8
3. BUSY is an output in master mode and an input in slave mode.  
4. A –A for 16K; A –A for 32K devices.  
0
13  
0
14  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-06045 Rev. *C  
Revised April 11, 2005  

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