Datasheet > CY62256EV18

CY62256EV18

更新时间： 2024-11-05 12:50:47

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
14页	269K
描述
256-Kbit (32 K Ã 8) Static RAM

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中文翻译

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数据手册

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CY62256EV18 数据手册

CY62256EV18 MoBL^®

256-Kbit (32 K × 8) Static RAM

256-Kbit (32

K × 8) Static RAM

Features

Functional Description

■ Very high speed: 70 ns

The CY62256EV18 is a high performance CMOS static RAM

module organized as 32 K words by 8-bits. This device features

advanced circuit design to provide ultra low active current. This

is ideal for providing More Battery Life™ (MoBL^®) in portable

applications such as cellular telephones. The device also has an

automatic power-down feature that significantly reduces power

consumption when addresses are not toggling. Placing the

device in standby mode reduces power consumption by more

than 99 percent when deselected (CE HIGH). The eight input

and output pins (I/O₀through I/O₇) are placed in a high

impedance state when the device is deselected (CE HIGH), the

outputs are disabled (OE HIGH), or a write operation is in

progress (CE LOW and WE LOW).

■ Temperature ranges:

❐ Industrial: –40 °C to +85 °C

■ Wide voltage range: 1.65 V to 2.25 V

■ Pin compatible with CY62256N

■ Ultra low standby power

❐ Typical standby current: 1 µA

❐ Maximum standby current: 4 µA

■ Ultra low active power

❐ Typical active current: 1.3 mA at f = 1 MHz

To write to the device, take chip enable (CE) LOW and write

enable (WE) LOW. Data on the eight I/O pins is then written into

the location specified on the address pin (A₀through A₁₄).

■ Easy memory expansion with CE and OE features

■ Automatic power-down when deselected

To read from the device, take chip enable (CE LOW) and output

enable (OE) LOW while forcing write enable (WE) HIGH. Under

these conditions, the contents of the memory location specified

by the address pins appear on the I/O pins.

■ Complementary metal oxide semiconductor (CMOS) for

optimum speed and power

■ Offered in Pb-free 28-pin Narrow SOIC package

Logic Block Diagram

I/O

INPUTBUFFER

32K x 8

ARRAY

POWER

DOWN

COLUMN

DECODER

I/O

Cypress Semiconductor Corporation

Document #: 001-69650 Rev. *B

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised September 4, 2012

12 3 4 5 6 7...14

中文翻译

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