Datasheet > CY62158CV25

CY62158CV25

更新时间： 2024-11-17 22:24:27

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
12页	259K
描述
1024K x 8 MoBL Static RAM

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中文翻译

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数据手册

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CY62158CV25 数据手册

CY62158CV25/30/33

MoBL™

1024K x 8 MoBL Static RAM

in portable applications such as cellular telephones. The de-

vice also has an automatic power-down feature that signifi-

cantly reduces power consumption by 80% when addresses

are not toggling. The device can be put into standby mode

reducing power consumption by more than 99% when dese-

lected (CE₁HIGH or CE₂LOW).

Features

• High Speed

— 55 ns and 70 ns availability

• Voltage range:

— CY62158CV25: 2.2V–2.7V

— CY62158CV30: 2.7V–3.3V

— CY62158CV33: 3.0V–3.6V

• Ultra low active power

— Typical active current: 1.5 mA @ f = 1 MHz

Writing to the device is accomplished by taking Chip Enable 1

(CE₁) and Write Enable (WE) inputs LOW and Chip Enable 2

(CE₂) HIGH. Data on the eight I/O pins (I/O₀through I/O₇) is

then written into the location specified on the address pins (A₀

through A₁₉).

Reading from the device is accomplished by taking Chip En-

able 1 (CE₁) and Output Enable (OE) LOW and Chip Enable

2 (CE₂) HIGH while forcing Write Enable (WE) HIGH. Under

these conditions, the contents of the memory location speci-

fied by the address pins will appear on the I/O pins.

— Typicalactivecurrent: 5.5mA @ f =f_max(70nsspeed)

• Low standby power

• Easy memory expansion with CE₁, CE₂and OE features

• Automatic power-down when deselected

• CMOS for optimum speed/power

The eight input/output pins (I/O₀through I/O₇) are placed in a

high-impedance state when the device is deselected (CE₁

LOW and CE₂HIGH), the outputs are disabled (OE HIGH), or

during a write operation (CE₁LOW and CE₂HIGH and WE

LOW).

Functional Description

The CY62158CV25/30/33 are high-performance CMOS static

RAMs organized as 1024K words by 8 bits. This device fea-

tures advanced circuit design to provide ultra-low active cur-

rent. This is ideal for providing More Battery Life™ (MoBL™)

The CY62158CV25/30/33 are available in a 48-ball FBGA

package.

Logic Block Diagram

I/O

Data in Drivers

1024K x 8

ARRAY

POWER

DOWN

COLUMN

DECODER

CE₁

CE₂

I/O

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-05019 Rev. *C

Revised April 24, 2002

12 3 4 5 6 7...12

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与CY62158CV25相关器件

型号	品牌	获取价格	描述	数据表
CY62158CV25LL-55BAI	ETC	获取价格	x8 SRAM
CY62158CV25LL-70BAI	CYPRESS	获取价格	1024K x 8 MoBL Static RAM
CY62158CV25LL-70BAIT	CYPRESS	获取价格	Standard SRAM, 1MX8, 70ns, CMOS, PBGA48, 6 X 10 MM, 1.20 MM HEIGHT, FBGA-48
CY62158CV30	CYPRESS	获取价格	1024K x 8 MoBL Static RAM
CY62158CV30LL-55BAI	CYPRESS	获取价格	1024K x 8 MoBL Static RAM
CY62158CV30LL-70BAI	CYPRESS	获取价格	1024K x 8 MoBL Static RAM
CY62158CV30LL-70BAIT	CYPRESS	获取价格	暂无描述
CY62158CV33	CYPRESS	获取价格	1024K x 8 MoBL Static RAM
CY62158CV33LL-55BAI	CYPRESS	获取价格	1024K x 8 MoBL Static RAM
CY62158CV33LL-70BAI	CYPRESS	获取价格	1024K x 8 MoBL Static RAM

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