Datasheet > CY62147BV18LL-70BAI

CY62147BV18LL-70BAI

更新时间： 2024-09-15 23:45:07

品牌	Logo	应用领域
其他 - ETC		内存集成电路静态存储器
页数	文件大小	规格书
11页	254K
描述
x16 SRAM

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47V

™

CY62147BV18 MoBL2

256K x 16 Static RAM

BHE are HIGH. The input/output pins (I/O₀through I/O₁₅) are

placed in a high-impedance state when: deselected (CE

HIGH), outputs are disabled (OE HIGH), BHE and BLE are

disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

Features

• Low voltage range:

— CY62147BV18: 1.65V–1.95V

• Ultra-low active, standby power

• Easy memory expansion with CE and OE features

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

• CMOS for optimum speed/power

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O₀through I/O₇), is

written into the location specified on the address pins (A₀

through A₁₇). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O₈through I/O₁₅) is written into the location

specified on the address pins (A₀through A₁₇).

Functional Description

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified by the address

pins will appear on I/O₀to I/O₇. If Byte High Enable (BHE) is

LOW, then data from memory will appear on I/O₈to I/O₁₅. See

the truth table at the back of this data sheet for a complete

description of read and write modes.

The CY62147BV18 is a high-performance CMOS static RAM

organized as 262,144 words by 16 bits. These devices feature

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™ (MoBL™) in por-

table applications such as cellular telephones. The devices

also have an automatic power-down feature that significantly

reduces power consumption by 99% when addresses are not

toggling. The device can also be put into standby mode when

deselected (CE HIGH) or when CE is LOW and both BLE and

The CY62147BV18 is available in 48-ball FBGA packaging.

Logic Block Diagram

DATA IN DRIVERS

256K x 16

RAM Array

I/O – I/O

2048 x 2048

I/O – I/O

COLUMN DECODER

BHE

BLE

Power -Down

Circuit

BHE

BLE

MoBL, MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-05073 Rev. *B

Revised September 4, 2001

12 3 4 5 6 7...11

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与CY62147BV18LL-70BAI相关器件

型号	品牌	获取价格	描述	数据表
CY62147CV18	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV18_02	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV18LL-55BAI	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV18LL-55BVI	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV18LL-70BAI	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV18LL-70BAIT	CYPRESS	获取价格	Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 7 X 8.50 MM, 1.20 MM HEIGHT, FBGA-48
CY62147CV18LL-70BVI	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV25	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV25LL-55BAI	CYPRESS	获取价格	256K x 16 Static RAM
CY62147CV25LL-55BVI	CYPRESS	获取价格	256K x 16 Static RAM

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