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CY62128ELL-55SXE PDF预览

CY62128ELL-55SXE

更新时间: 2024-01-07 11:32:30
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
11页 948K
描述
1-Mbit (128K x 8) Static RAM

CY62128ELL-55SXE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP1
包装说明:TSOP1, TSSOP32,.8,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.12
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32JESD-609代码:e3
长度:18.4 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP32,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.00003 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.035 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:8 mm

CY62128ELL-55SXE 数据手册

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CY62128E MoBL®  
1-Mbit (128K x 8) Static RAM  
Features  
Functional Description[1]  
The CY62128E is a high performance CMOS static RAM  
organized as 128K words by 8 bits. This device features  
advanced circuit design to provide ultra low active current.  
This is ideal for providing More Battery Life™ (MoBL®) in  
portable applications such as cellular telephones. The device  
also has an automatic power down feature that significantly  
reduces power consumption when addresses are not toggling.  
Placing the device into standby mode reduces power  
consumption by more than 99% when deselected (CE1 HIGH  
or CE2 LOW). The eight input and output pins (IO0 through  
IO7) are placed in a high impedance state when the device is  
deselected (CE1 HIGH or CE2 LOW), the outputs are disabled  
(OE HIGH), or a write operation is in progress (CE1 LOW and  
CE2 HIGH and WE LOW)  
• Very high speed: 45 ns  
Temperature ranges  
— Industrial: –40°C to +85°C  
— Automotive-A: –40°C to +85°C  
— Automotive-E: –40°C to +125°C  
• Voltage range: 4.5V–5.5V  
• Pin compatible with CY62128B  
• Ultra low standby power  
— Typical standby current: 1 µA  
— Maximum standby current: 4 µA (Industrial)  
• Ultra low active power  
To write to the device, take Chip Enable (CE1 LOW and CE2  
HIGH) and Write Enable (WE) inputs LOW. Data on the eight  
IO pins (IO0 through IO7) is then written into the location  
specified on the address pins (A0 through A16).  
— Typical active current: 1.3 mA @ f = 1 MHz  
• Easy memory expansion with CE1, CE2 and OE features  
• Automatic power down when deselected  
• CMOS for optimum speed and power  
To read from the device, take Chip Enable (CE1 LOW and CE2  
HIGH) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH. Under these conditions, the contents of  
the memory location specified by the address pins appears on  
the IO pins.  
• Offered in standard Pb-free 32-pin STSOP, 32-pin SOIC,  
and 32-pin TSOP I packages  
Logic Block Diagram  
IO  
0
INPUT BUFFER  
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
IO  
1
IO  
2
128K x 8  
ARRAY  
IO  
3
IO  
IO  
IO  
IO  
4
5
6
7
A
A
A
9
10  
11  
CE  
CE  
1
2
POWER  
DOWN  
COLUMN DECODER  
WE  
OE  
Note  
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 38-05485 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised May 07, 2007  
[+] Feedback  

CY62128ELL-55SXE 替代型号

型号 品牌 替代类型 描述 数据表
CY62128ELL-55SXET CYPRESS

完全替代

暂无描述
CY62128BNLL-70SXE CYPRESS

完全替代

1-Mbit (128K x 8) Static RAM

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