CY62128EV30 MoBL®
1 Mbit (128K x 8) Static RAM
Features
Functional Description[1]
• Very high speed: 45 ns
The CY62128EV30 is a high performance CMOS static RAM
module organized as 128K words by 8 bits. This device
features advanced circuit design to provide ultra low active
current. This is ideal for providing More Battery Life™ (MoBL®)
in portable applications such as cellular telephones. The
device also has an automatic power down feature that signifi-
cantly reduces power consumption when addresses are not
toggling. Placing the device into standby mode reduces power
consumption by more than 99% when deselected (CE1 HIGH
or CE2 LOW). The eight input and output pins (IO0 through
IO7) are placed in a high impedance state when the device is
deselected (CE1 HIGH or CE2 LOW), the outputs are disabled
(OE HIGH), or a write operation is in progress (CE1 LOW and
CE2 HIGH and WE LOW).
• Temperature ranges–
— Industrial: –40°C to +85°C
— Automotive-A: –40°C to +85°C
— Automotive-E: –40°C to +125°C
• Wide voltage range: 2.20V – 3.60V
• Pin compatible with CY62128DV30
• Ultra low standby power
— Typical standby current: 1 µA
— Maximum standby current: 4 µA
• Ultra low active power
To write to the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Write Enable (WE) inputs LOW. Data on the eight
IO pins is then written into the location specified on the
Address pin (A0 through A16).
— Typical active current: 1.3 mA @ f = 1 MHz
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
To read from the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins appear on
the IO pins.
• Offered in Pb-free 32-pin SOIC, 32-pin TSOP I, and 32-pin
STSOP packages
Logic Block Diagram
IO
0
INPUT BUFFER
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
IO
1
IO
2
128K x 8
ARRAY
IO
3
IO
IO
IO
IO
4
5
6
7
A
A
A
9
10
11
CE
CE
1
2
POWER
DOWN
COLUMN DECODER
WE
OE
Note
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05579 Rev. *C
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised May 07, 2007
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