CY7C68001
EZ-USB SX2™ High-Speed USB Interface Device
1.0
EZ-USB SX2™ Features
2.0
Applications
• USB 2.0-certified compliant
• DSL modems
—On the USB-IF Integrators List: Test ID Number
40000713
• ATA interface
• Memory card readers
• Legacy conversion devices
• Cameras
• Operates at high (480 Mbps) or full (12 Mbps) speed
• Supports Control Endpoint 0:
—Used for handling USB device requests
• Scanners
• Supports four configurable endpoints that share a 4-
KB FIFO space
• Home PNA
• Wireless LAN
• MP3 players
• Networking
—Endpoints 2, 4, 6, 8 for application-specific control
and data
• Standard 8- or 16-bit external master interface
• Printers
—Glueless interface to most standard microproces-
sors DSPs, ASICs, and FPGAs
The “Reference Designs” section of the Cypress web site
provides additional tools for typical USB applications. Each
reference design comes complete with firmware source code
and object code, schematics, and documentation. Please see
the Cypress web site at www.cypress.com.
—Synchronous or Asynchronous interface
• Integrated phase-locked loop (PLL)
• 3.3V operation, 5V tolerant I/Os
• 56-pin SSOP and QFN package
• Complies with most device class specifications
2.1
Block Diagram
SCL
SDA
I2C Bus
Controller
(Master Only)
IFCLK*
Read*, Write*, OE*, PKTEND*, CS#
Interrupt#, Ready
24 MHz
XTAL
PLL
SX2 Internal Logic
Flags (3/4)
Address (3)
Control
VCC
FIFO
Data
Bus
1.5K
8/16-Bit Data
CY Smart USB
FS/HS Engine
4 KB
FIFO
DPLUS
DMINUS
Data
USB 2.0 XCVR
Figure 2-1. Block Diagram
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-08013 Rev. *E
Revised July 13, 2004