Datasheet > CY3683

CY3683

更新时间： 2024-11-09 04:13:23

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
14页	334K
描述
TX2⑩ USB 2.0 UTMI Transceiver

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中文翻译

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CY3683 数据手册

CY7C68000

TX2™ USB 2.0 UTMI Transceiver

• Synchronous field and EOP detection on receive

packets

1.0

EZ-USBTX2™ Features

The Cypress EZ-USB TX2™ is a Universal Serial Bus (USB)

specification revision 2.0 transceiver, serial/deserializer, to a

parallel interface of either 16 bits at 30 MHz or eight bits at 60

MHz. The TX2 provides a high-speed physical layer interface

that operates at the maximum allowable USB 2.0 bandwidth.

This allows the system designer to keep the complex high-

speed analog USB components external to the digital ASIC

which decreases development time and associated risk. A

standard interface is provided that is USB 2.0-certified and is

compliant with Transceiver Macrocell Interface (UTMI) speci-

fication version 1.05 dated 3/29/01.

• Synchronous field and EOP generation on transmit

packets

• Data and clock recovery from the USB serial stream

• Bit stuffing/unstuffing; bit stuff error detection

• Staging register to manage data rate variation due to

bit stuffing/unstuffing

• 16-bit 30-MHz, and 8-bit 60-MHz parallel interface

• Ability to switch between FS and HS terminations and

signaling

• Supports detection of USB reset, suspend, and resume

Two packages are defined for the family: 56-pin SSOP and 56-

pin QFN.

• Supports HS identification and detection as defined by

the USB 2.0 Specification

The function block diagram is shown in Figure 1-1. The

features of the EX-USB TX2 are:

• Supports transmission of resume signaling

• 3.3 V operation

• UTMI-compliant/USB-2.0-certified for device operation

• Two package options—56-pin QFN, and 56-pin SSOP

• Operates in both USB 2.0 high speed (HS), 480

Mbits/second, and full speed (FS), 12 Mbits/second

• All required terminations, including 1.5K-ohm pull up

on DPLUS, are internal to the chip

• Serial-to-parallel and parallel-to-serial conversions

• Supports USB 2.0 test modes

• 8-bit unidirectional, 8-bit bidirectional, or 16-bit

bidirectional external data interface

CY7C68000

20X

PLL

XTALIN/

OUT

UTMI CLK

OSC

UTMI CLK

PLL_480

Full-Speed Rx

High-Speed Rx

UTMI Rx Ctl

Digital

UTMI Rx Data 8/16

Fast

Digital

Traffic

Sync

Elasticity

Buffer

USB

BIDI Option

Also

USB

2.0

Fast

Digital

XCVR

High-Speed Tx

Full-Speed Tx

UTMI TRx Data 8/16

UTMI Tx Ctl

Digital

Figure 1-1. Block Diagram

Cypress Semiconductor Corporation

Document #: 38-08016 Rev. *H

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised May 2, 2006

12 3 4 5 6 7...14

中文翻译

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