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CY14B256K-SP25XCT PDF预览

CY14B256K-SP25XCT

更新时间: 2024-11-05 04:13:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 计时器或实时时钟微控制器和处理器外围集成电路静态存储器光电二极管双倍数据速率
页数 文件大小 规格书
23页 1346K
描述
256-Kbit (32K x 8) nvSRAM with Real-Time-Clock

CY14B256K-SP25XCT 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SSOP包装说明:ROHS COMPLIANT, SSOP-48
针数:48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.61Is Samacsys:N
最大时钟频率:0.032 MHz外部数据总线宽度:8
信息访问方法:PARALLEL, DIRECT ADDRESSJESD-30 代码:R-PDSO-G48
JESD-609代码:e4长度:15.875 mm
湿度敏感等级:3端子数量:48
计时器数量:1最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.794 mm
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:7.51 mm
uPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCKBase Number Matches:1

CY14B256K-SP25XCT 数据手册

 浏览型号CY14B256K-SP25XCT的Datasheet PDF文件第2页浏览型号CY14B256K-SP25XCT的Datasheet PDF文件第3页浏览型号CY14B256K-SP25XCT的Datasheet PDF文件第4页浏览型号CY14B256K-SP25XCT的Datasheet PDF文件第5页浏览型号CY14B256K-SP25XCT的Datasheet PDF文件第6页浏览型号CY14B256K-SP25XCT的Datasheet PDF文件第7页 
PRELIMINARY  
CY14B256K  
256-Kbit (32K x 8) nvSRAM with Real-Time-Clock  
Features  
Functional Description  
• Data integrity of Cypress nvSRAM combined with full  
featured real time clock  
The Cypress CY14B256K combines a 256 Kbit nonvolatile  
static RAM with a full featured real-time-clock in a monolithic  
integrated circuit. The embedded nonvolatile elements  
incorporate QuantumTrap technology producing the world’s  
most reliable nonvolatile memory. The SRAM can be read and  
written an infinite number of times, while independent,  
nonvolatile data resides in the nonvolatile elements.  
— Low power, 300 nA Max, RTC current  
— Capacitor or battery backup for RTC  
• Watchdog timer  
• Clock alarm with programmable interrupts  
• 25 ns, 35 ns, and 45 ns access times  
The real-time-clock function provides an accurate clock with  
leap year tracking and a programmable, high accuracy  
oscillator. The alarm function is programmable for one time  
alarms or periodic seconds, minutes, hours, or days. There is  
also a programmable watchdog timer for process control.  
• “Hands-off” automatic STORE on power down with only a  
small capacitor  
STOREtoQuantumTrapinitiatedbysoftware, devicepin,  
or on power down  
RECALL to SRAM initiated by software or on power up  
• Infinite READ, WRITE, and RECALL cycles  
• High reliability  
— Endurance to 200K cycles  
— Data retention: 20 years @ 55°C  
• 10 mA typical ICC at 200 ns cycle time  
• Single 3V operation with tolerance of +15%, -10%  
• Commercial and industrial temperature  
• SSOP Package (ROHS compliant)  
Logic Block Diagram  
V
CC  
V
CAP  
QuantumTrap  
512 X 512  
V
RTCbat  
POWER  
A5  
STORE  
CONTROL  
V
RTCcap  
A6  
A7  
A8  
RECALL  
STORE/  
RECALL  
CONTROL  
STATIC RAM  
ARRAY  
512 X 512  
HSB  
A9  
A11  
A12  
A13  
A14  
SOFTWARE  
DETECT  
A13  
-
A0  
DQ0  
COLUMN IO  
DQ1  
DQ2  
DQ3  
COLUMN DEC  
x1  
x2  
RTC  
MUX  
INT  
DQ4  
DQ5  
DQ6  
DQ7  
A0  
A4  
A10  
A1  
A3  
A2  
A14  
-
A0  
OE  
CE  
WE  
Cypress Semiconductor Corporation  
Document Number: 001-06431 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 29, 2007  
[+] Feedback  

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