Datasheet > CS5581_08

CS5581_08

更新时间： 2022-12-28 02:28:13

品牌	Logo	应用领域
凌云 - CIRRUS		/
页数	文件大小	规格书
32页	505K
描述
±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ΔΣ ADC

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CS5581_08 数据手册

3/25/08

14:34

CS5581

SWITCHING CHARACTERISTICS (CONTINUED)

T = -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;

VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%

Input levels: Logic 0 = 0V = Low; Logic 1 = VD+ = High; CL = 15 pF.

Parameter

Serial Port Timing in SSC Mode (SMODE = VL)

RDY falling to MSB stable

Symbol

Min

Typ

Max

Unit

-2

MCLKs

Data hold time after SCLK rising

Serial Clock (Out)

(Note 11, 12)

Pulse Width (low)

Pulse Width (high)

RDY rising after last SCLK rising

MCLKs

11. SDO and SCLK will be high impedance when CS is high. In some systems SCLK and SDO may require pull-down

resistors.

12. SCLK = MCLK/2.

MCLK

RDY

t₅

t₁

t₃

t₄

t₂

SCLK(o)

LSB

LSB+1

SDO

MSB

MSB–1

Figure 1. SSC Mode - Read Timing, CS remaining low (Not to Scale)

DS796PP1

1...4 5 678 9 10...32

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