June 1999
CLC5956
12-bit, 65 MSPS Broadband Monolithic A/D Converter
General Description
Features
n Wide dynamic range
n IF sampling capability
n 300 MHz input bandwidth
n Small 48-pin TSSOP
n Single +5V supply
n Low cost
The CLC5956 is
a
monolithic 12-bit, 65 MSPS
analog-to-digital converter subsystem. The device has been
optimized for use in cellular base stations and other applica-
tions where high resolution, high sampling rate, wide dy-
namic range, low power dissipation, and compact size are
required. The CLC5956 features differential analog inputs,
low jitter differential PECL clock inputs, a low distortion
track-and-hold with DC to 300 MHz input bandwidth, a band-
gap voltage reference, TTL compatible CMOS output logic,
and a proprietary 12-bit multi-stage quantizer. The CLC5956
is fabricated on the ABIC-IV 0.8 micron BiCMOS process.
The part features a 73 dB spurious free dynamic range
(SFDR) and 67 dB SNR. The wideband track-and-hold al-
lows sampling of IF signals to greater than 250 MHz. The
part produces two-tone, dithered, spurious-free dynamic
range of 83 dBFS at 75 MHz input frequency. The differential
analog input provides excellent common-mode rejection,
while the differential PECL clock inputs permit the use of bal-
anced transmission to minimize jitter in distributed systems.
The 48-pin TSSOP package provides an extremely small
footprint for applications where space is a critical consider-
ation. The CLC5956 operates from a single +5V power sup-
ply over the industrial temperature range of −40˚C to +85˚C.
National thoroughly tests each part to verify full compliance
with the guaranteed specifications.
Key Specifications
n Sample Rate
n SFDR
n SFDR with dither
n SNR
n Low power consumption
65 MSPS
73 dBc
85 dBFS
67 dB
615 mW
Applications
n Cellular base-stations
n Digital communications
n Infrared/CCD imaging
n IF sampling
n Electro-optics
n Instrumentation
n Medical imaging
n High definition video
Block Diagram
DS015011-2
© 1999 National Semiconductor Corporation
DS015011
www.national.com