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CLC5958PCASM PDF预览

CLC5958PCASM

更新时间: 2024-01-12 00:01:41
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器光电二极管信息通信管理
页数 文件大小 规格书
13页 1616K
描述
14-bit, 52MSPS A/D Converter

CLC5958PCASM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SON, SOLCC48,.28,20Reach Compliance Code:unknown
ECCN代码:3A991.C.3HTS代码:8542.39.00.01
风险等级:5.91最大模拟输入电压:2.048 V
最长转换时间:0.0192 µs转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:R-PDSO-N48JESD-609代码:e0
长度:12.5 mm模拟输入通道数量:1
位数:14功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出位码:2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:SON封装等效代码:SOLCC48,.28,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3,5 V
认证状态:Not Qualified采样速率:52 MHz
采样并保持/跟踪并保持:TRACK座面最大高度:1.1 mm
子类别:Analog to Digital Converters标称供电电压:5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.1 mmBase Number Matches:1

CLC5958PCASM 数据手册

 浏览型号CLC5958PCASM的Datasheet PDF文件第2页浏览型号CLC5958PCASM的Datasheet PDF文件第3页浏览型号CLC5958PCASM的Datasheet PDF文件第4页浏览型号CLC5958PCASM的Datasheet PDF文件第5页浏览型号CLC5958PCASM的Datasheet PDF文件第6页浏览型号CLC5958PCASM的Datasheet PDF文件第7页 
September 1999  
N
CLC5958  
14-bit, 52MSPS A/D Converter  
General Description  
Features  
The CLC5958 is a monolithic 14-bit, 52MSPS analog-to-digital  
converter. The ultra-wide dynamic range and high sample rate of  
the device make it an excellent choice for wideband receivers  
found in multi-channel basestations. The CLC5958 integrates a  
low distortion track-and-hold amplifier and a 14-bit multi-stage  
quantizer on a single die. Other features include differential  
analog inputs, low jitter differential clock inputs, an internal  
bandgap voltage reference, and CMOS/TTL compatible outputs.  
The CLC5958 is fabricated on the National ABIC-V 0.8 micron  
BiCMOS process.  
• 14-bit  
• 52MSPS  
• Ultra-wide dynamic range  
Noise floor: -72dBFS  
SFDR: 90dB  
• Excellent performance to Nyquist  
• IF sampling capability  
• Very small package: 48-pin CSP  
• Programmable output levels:  
3.3V to 5V  
The CLC5958 features a 90dB spurious free dynamic range  
(SFDR) and a 70dB signal to noise ratio (SNR). The balanced  
differential analog inputs ensure low even-order distortion, while  
the differential clock inputs permit the use of balanced clock signals  
to minimize clock jitter. The 48-pin CSP package provides an  
extremely small footprint for applications where space is a critical  
consideration. The package also provides a very low thermal  
resistance to ambient. The CLC5958 may be operated with a  
single +5V power supply. Alternatively, an additional supply may  
be used to program the digital output levels over the range of  
+3.3V to +5V. Operation over the industrial temperature range of  
-40°C to +85°C is guaranteed. National Semiconductor tests  
each part to verify compliance with the guaranteed specifications.  
Applications  
• Multi-channel basestations  
• Multi-standard basestations:  
GSM, WCDMA, DAMPS, etc.  
• Smart antenna systems  
• Wireless local loop  
• Wideband digital communications  
Actual Size  
(Bottom View)  
Output Response with GSM 1800 Blocker  
Single-Tone Output Spectrum  
-20  
-40  
0
Sample Rate = 52MSPS  
Input Frequency = 5MHz  
-20  
Full Scale = -24dBM  
Res. BW = 200KHz  
-25dBm blocker  
-40  
-60  
-60  
-80  
-101dBm reference  
-80  
-100  
-120  
-100  
-120  
0
5
10  
15  
20  
25  
0
5
10  
15  
20  
25  
Frequency (MHz)  
Frequency (MHz)  
© 1999 National Semiconductor Corporation  
Printed in the U.S.A.  
http://www.national.com  

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