8-Pin Dual Op Amp Eval. Boards
Part Numbers CLC730038, CLC730036
N
The CLC730038 and CLC730036 evaluation
boards are designed to aid in the characterization of
Comlinear’s 8-pin, dual monolithic amplifiers.
September 1997
1. Cut the input trace as shown in Figure 2
2. Use 25Ω for R
in
3. Terminate R at the input trace instead of
g
ground (See Figure 2)
■
CLC730038 - DIP packages
Uses all through-hole components
CLC730036 - SOIC packages
4. Add R for desired input impedance (input
t
impedance = R ||R )
g
t
■
Uses all surface-mount components
Cut Here
7 3
R
Both boards have identical circuit configurations and are
designed for non-inverting gains. Inverting gains
or other circuit configurations can be obtained with slight
modifications to the boards. Use the evaluation boards
as a:
RF1
RG1
25Ω
RIN1
Rt
■
Guide for high frequency layout
■
Tool to aid in device testing and characterization
IN1
Basic Operation
Figure 1 shows the non-inverting schematic for both
boards. The input signal is brought into the board
through SMA connectors to the non-inverting input
Figure 2: Modifications for Inverting Gains
(CLC730038 board shown)
Figure 3 illustrates the inverting schematic for both
boards.
of the amplifier. The resistor R is used to set the
in
input termination resistance to the op amp. The non-
inverting gain is set by the following equation:
+VCC
C3
5
6
+
R
+
f
OUT2
Rout2
25Ω
Non-inverting Gain: 1+
7
Channel 2
Rin2
R
IN2
g
-
C1
8
3
2
Rf2
Rg2
Rt2
+
The value of the feedback resistor, R , has a strong
OUT1
25Ω
Rin1
f
1
Channel 1
IN1
influence on AC performance. Refer to the product data
sheet for feedback resistor selection. The output of the
Rout1
-
4
Rf1
Rg1
Rt1
C2
op amp travels through a series resistance, R , and
out
Select Rt to yield desired
input impedance = Rg||Rt
then leaves the board through an SMA connector. The
+
series resistance, R , matches transmission lines or
isolates the output from capacitive loads.
C4
out
-VCC
+VCC
Figure 3: Inverting Gain Configurations
Isolation and Channel Matching Performance
C3
+
For maximum isolation between channels, proper power
supply decoupling is required. Always include the
bypass capacitors C1, C2, C3, and C4. The use of good
quality capacitors also helps to achieve better isolation
performance.
C1
8
IN1
IN2
Rin2
3
2
5
6
+
+
OUT1
OUT2
Rout2
1
7
Channel 1
Channel 2
Rin1
Rout1
-
-
4
Rf1
Rf2
C2
Rg1
Rg2
+
The evaluation boards have also been designed to mini-
mize channel-to-channel crosstalk. The input and output
pins of the amplifier are sensitive to the coupling of par-
asitic capacitances caused by power or ground planes
and traces. To reduce the influence of these parasitics,
the ground plane has been removed around these sen-
sitive nodes. In multilayer boards, remove both the
ground and power traces and planes around the input
and output pins.
C4
-VCC
Figure 1: Non-inverting Gain Configurations
Inverting Gain Operation
The evaluation boards can be modified to provide an
inverting gain configuration. Complete these steps to
modify the board:
© 1997 National Semiconductor Corporation
Printed in the U.S.A.
http://www.national.com
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