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CLC5957MTDX/NOPB PDF预览

CLC5957MTDX/NOPB

更新时间: 2024-11-09 20:09:07
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管转换器
页数 文件大小 规格书
21页 1677K
描述
IC 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO48, TSSOP-48, Analog to Digital Converter

CLC5957MTDX/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
最大模拟输入电压:2.048 V转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm最大线性误差 (EL):0.04%
湿度敏感等级:2模拟输入通道数量:1
位数:12功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出位码:2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified采样速率:70 MHz
采样并保持/跟踪并保持:TRACK座面最大高度:1.2 mm
子类别:Analog to Digital Converters标称供电电压:5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:6.1 mmBase Number Matches:1

CLC5957MTDX/NOPB 数据手册

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OBSOLETE  
CLC5957  
www.ti.com  
SNWS004C JUNE 2000REVISED APRIL 2013  
CLC5957 12-Bit, 70 MSPS Broadband Monolithic A/D Converter  
Check for Samples: CLC5957  
1
FEATURES  
DESCRIPTION  
The CLC5957 is a monolithic 12-bit, 70MSPS analog-  
2
70MSPS  
to-digital converter. The device has been optimized  
for use in IF-sampled digital receivers and other  
applications where high resolution, high sampling  
rate, wide dynamic range, low power dissipation, and  
compact size are required. The CLC5957 features  
differential analog inputs, low jitter differential  
universal clock inputs, a low distortion track-and-hold  
with 0-300MHz input bandwidth, a bandgap voltage  
reference, data valid clock output, TTL compatible  
CMOS (3.3V or 2.5V) programmable output logic, and  
Wide Dynamic Range:  
SFDR: 74dBc  
SFDR with Wither: 85dBFS  
SNR: 67dB  
IF Sampling Capability  
Input Bandwidth = 0-300MHz  
Low Power Dissipation: 640mW  
Very Small Package: 48-pin TSSOP  
Single +5V Supply  
a
proprietary 12-bit multi-stage quantizer. The  
CLC5957 is fabricated on the ABIC-V 0.8 micron  
BiCMOS process.  
Data Valid Clock Output  
The CLC5957 features  
a 74dBc spurious free  
Programmable Output Levels: 3.3V or 2.5V  
dynamic range (SFDR) and a 67dB signal to noise  
ratio (SNR). The wideband track-and-hold allows  
sampling of IF signals to greater than 250MHz. The  
part produces two-tone, dithered, SFDR of 83dBFS at  
75MHz input frequency. The differential analog input  
provides excellent common mode rejection, while the  
differential universal clock inputs minimize jitter. The  
48-pin TSSOP package provides an extremely small  
footprint for applications where space is a critical  
consideration. The CLC5957 operates from a single  
+5V power supply. Operation over the industrial  
temperature range of -40°C to +85°C is specified.  
Each part is tested to verify compliance with the  
ensured specifications.  
APPLICATIONS  
Cellular Base Stations  
Digital Communications  
Infrared/CCD Imaging  
IF Sampling  
Electro-optics  
Instrumentation  
Medical Imaging  
High Definition Video  
Block Diagram  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2000–2013, Texas Instruments Incorporated  

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