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CLC5955MTDX

更新时间： 2024-11-09 04:12:15
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
10页 222K
描述
11-bit, 55MSPS Broadband Monolithic A/D Converter

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CLC5955MTDX 数据手册

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April 2002  
N
CLC5955  
11-bit, 55MSPS Broadband Monolithic A/D Converter  
General Description  
Features  
The CLC5955 is a monolithic 11-bit, 55MSPS analog-to-digital  
converter. The device has been optimized for use in IF-sampled  
digital receivers and other applications where high resolution,  
high sampling rate, wide dynamic range, low power dissipation,  
and compact size are required. The CLC5955 features differential  
analog inputs, low jitter differential universal clock inputs, a low  
distortion track-and-hold with 0-300MHz input bandwidth, a bandgap  
voltage reference, data valid clock output, TTL compatible CMOS  
(3.3V or 2.5V) programmable output logic, and a proprietary multi-  
stage quantizer. The CLC5955 is fabricated on the ABIC-V 0.8  
micron BiCMOS process.  
• 55MSPS  
• Wide dynamic range  
SFDR: 74dBc  
SFDR w/dither: 85dBFS  
SNR: 64dB  
• IF sampling capability  
• Input bandwidth = 0-300MHz  
• Low power dissipation: 640mW  
• Very small package: 48-pin TSSOP  
• Single +5V supply  
• Data valid clock output  
• Programmable output levels:  
3.3V or 2.5V  
The CLC5955 features a 74dBc spurious free dynamic range  
(SFDR) and a 64dB signal to noise ratio (SNR). The wideband  
track-and-hold allows sampling of IF signals to greater than  
250MHz. The part produces two-tone, dithered, SFDR of 83dBFS  
at 75MHz input frequency. The differential analog input provides  
excellent common mode rejection, while the differential universal  
clock inputs minimize jitter. The 48-pin TSSOP package provides  
an extremely small footprint for applications where space is a  
critical consideration. The CLC5955 operates from a single +5V  
power supply. Operation over the industrial temperature range of  
-40°C to +85°C is guaranteed. National Semiconductor tests  
each part to verify compliance with the guaranteed specifications.  
Applications  
• Cellular base-stations  
• Digital communications  
• Infrared/CCD imaging  
• IF sampling  
• Electro-optics  
• Instrumentation  
• Medical imaging  
• High definition video  
ME79TG  
CLC5955  
Actual Size  
MTD  
N
ADC Block Diagram  
First IF Receiver  
DAV  
Clock  
In  
CLC5903  
DVGA  
(∆G = 42dB)  
IF  
CLC5955  
11-bit  
55MSPS  
ADC  
Saw  
Dig.  
Tuner/  
Filter  
AGC  
IF  
Input  
11  
20  
~
~
BPF  
(150MHz  
typ.)  
Q
Q
Q
Q
A
In  
DAV  
T/H  
Noise  
BPF  
3-bit (Gain Control)  
11  
ADC  
Out  
Decimation/filter = 190/0.8  
Output BW = 50M/190 X 0.8 = 210KHz  
Bit Align/Error Correct  
Receiver SINAD vs. Input Amplitude  
Single Tone Output Spectrum w/Dither  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
90  
80  
70  
60  
50  
40  
30  
20  
10  
F
in  
= 25.3MHZ  
F
= 66MHz  
sample  
-80  
-90  
-100  
0
0
4
8
12  
16  
20  
24  
28  
32  
-125  
-100  
-75  
-50  
-25  
0
Frequency (MHz)  
Input (dBFS)  
© 2002 National Semiconductor Corporation  
Printed in the U.S.A.  
http://www.national.com  
1234567...10

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