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CDC906PWRG4 PDF预览

CDC906PWRG4

更新时间: 2024-11-24 04:11:43
品牌 Logo 应用领域
德州仪器 - TI 时钟
页数 文件大小 规格书
39页 1085K
描述
PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

CDC906PWRG4 数据手册

 浏览型号CDC906PWRG4的Datasheet PDF文件第2页浏览型号CDC906PWRG4的Datasheet PDF文件第3页浏览型号CDC906PWRG4的Datasheet PDF文件第4页浏览型号CDC906PWRG4的Datasheet PDF文件第5页浏览型号CDC906PWRG4的Datasheet PDF文件第6页浏览型号CDC906PWRG4的Datasheet PDF文件第7页 
CDC906  
www.ti.com  
SCAS828SEPTEMBER 2006  
PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER  
FEATURES  
3.3-V Device Power Supply  
High Performance 2:6 PLL based Clock  
Commercial Temperature Range 0°C to 70°C  
Synthesizer / Multiplier / Divider  
Development and Programming Kit for Easy  
PLL Design and Programming  
(TI Pro-Clock™)  
User Programmable PLL Frequencies  
Easy In-Circuit Programming via SMBus Data  
Interface  
Packaged in 20-Pin TSSOP  
Wide PLL Divider Ratio Allows 0-PPM Output  
Clock Error  
Factory Programmable for Customized  
Default Settings are Available. Contact TI  
Sales Fordes for Further Details.  
Generates Precise Video (27 MHz or 54 MHz)  
and Audio System Clocks from Multiple  
Sampling Frequencies (fS = 16, 22.05, 24, 32,  
44.1, 48, 96 kHz)  
APPLICATIONS  
Digital TV  
Printer / Scanner  
Set Top Box  
Video / Audio  
Clock Inputs Accept a Crystal or a  
Single-Ended LVCMOS or a Differential Input  
Signal  
Accepts Crystal Frequencies from 8 MHz up  
to 54 MHz  
TERMINAL ASSIGNMENT  
Accepts LVCMOS or Differential Input  
Frequencies up to 167 MHz  
PW PACKAGE  
(TOP VIEW)  
Two Programmable Control Inputs [S0/S1] for  
User Defined Control Signals  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
S0/CLK_SEL  
Y5  
2
S1  
VCC  
Y4  
Six LVCMOS Outputs with Output  
Frequencies up to 167 MHz  
3
VCCOUT2  
GND  
Y3  
4
GND  
CLK_IN0  
CLK_IN1  
VCC  
TSSOP 20  
Pitch 0,65 mm  
6.6 x 6.6  
5
LVCMOS Outputs can be Programmed for  
Complementary Signals  
6
Y2  
7
VCCOUT1  
GND  
Y1  
Free Selectable Output Frequency via  
Programmable Output Switching Matrix [6x6]  
Including 7-Bit Post-Divider for Each Output  
8
GND  
9
SDATA  
SCLOCK  
10  
Y0  
PLL Loop Filter Components Integrated  
Low Period Jitter (Typical 60 ps)  
Features Spread Spectrum Clocking (SSC)  
for Lowering System EMI  
Programmable Center Spread SSC  
Modulation (±0.1%, ±0.25%, and ±0.4%) with a  
Mean Phase Equal to the Phase of the  
Non-Modulated Frequency  
Programmable Down Spread SSC Modulation  
(1%, 1.5%, 2%, and 3%)  
Programmable Output Slew-Rate Control  
(SRC) for Lowering System EMI  
Separate Power Supplies for Outputs  
(2.3 V to 3.6 V) Supports Mixed Power  
Supply Environments  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Pro-Clock is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006, Texas Instruments Incorporated  

CDC906PWRG4 替代型号

型号 品牌 替代类型 描述 数据表
CDC906PWG4 TI

完全替代

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
CDC906PW TI

完全替代

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
CDC906PWR TI

类似代替

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

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