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CD74HC670 PDF预览

CD74HC670

更新时间: 2024-09-18 23:00:39
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
9页 51K
描述
High-Speed CMOS Logic 4x4 Register File

CD74HC670 数据手册

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CD74HC670,  
CD74HCT670  
Data sheet acquired from Harris Semiconductor  
SCHS195  
High-Speed CMOS Logic  
4x4 Register File  
January 1998  
at V  
= 5V  
Features  
CC  
• HCT Types  
• Simultaneous and Independent Read and Write  
Operations  
- 4.5V to 5.5V Operation  
[ /Title  
(CD74H  
C670,  
- Direct LSTTL Input Logic Compatibility,  
• Expandable to 512 Words of n-Bits  
• Three-State Outputs  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
CD74H  
CT670)  
/Subject  
(High-  
Speed  
CMOS  
Logic  
4x4 Reg-  
ister  
• Organized as 4 Words x 4 Bits Wide  
• Buffered Inputs  
Description  
The Harris CD74HC670 and CD74HCT670 are 16-bit register  
files organized as 4 words x 4 bits each. Read and write  
address and enable inputs allow simultaneous writing into one  
location while reading another. Four data inputs are provided  
to store the 4-bit word. The write address inputs (WA0 and  
WA1) determine the location of the stored word in the register.  
When write enable (WE) is low the word is entered into the  
• Typical Read Time = 16ns for CD74HC670 V  
CC  
= 5V, C  
L
o
= 15pF, T = 25 C  
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C address location and it remains transparent to the data. The  
outputs will reflect the true form of the input data. When (WE)  
is high data and address inputs are inhibited. Data acquisition  
• Balanced Propagation Delay and Transition Times  
from the four registers is made possible by the read address  
inputs (RA1 and RA0). The addressed word appears at the  
output when the read enable (RE) is low. The output is in the  
high impedance state when the (RE) is high. Outputs can be  
tied together to increase the word capacity to 512 x 4 bits.  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
Ordering Information  
Pinout  
CD74HC670, CD74HCT670  
(PDIP, SOIC)  
TOP VIEW  
D1  
D2  
1
2
3
4
5
6
7
8
16 V  
CC  
15 D0  
D3  
14 WA0  
13 WA1  
12 WE  
11 RE  
10 Q0  
RA1  
RA0  
Q3  
Q2  
9
Q1  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1660.1  
Copyright © Harris Corporation 1998  
1

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