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BS616LV8019FCG70 PDF预览

BS616LV8019FCG70

更新时间: 2024-11-12 22:25:59
品牌 Logo 应用领域
BSI 存储内存集成电路静态存储器
页数 文件大小 规格书
9页 272K
描述
Very Low Power/Voltage CMOS SRAM 512K X 16 bit

BS616LV8019FCG70 技术参数

是否Rohs认证:符合生命周期:Obsolete
包装说明:LFBGA, BGA48,6X8,30Reach Compliance Code:unknown
风险等级:5.84Is Samacsys:N
最长访问时间:70 ns备用内存宽度:8
I/O 类型:COMMONJESD-30 代码:R-PBGA-B48
JESD-609代码:e1长度:12 mm
内存密度:8388608 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:48
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA48,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:1.4 mm
最大待机电流:0.0000025 A最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.06 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Silver/Copper (Sn95.5Ag3.8Cu0.7)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
宽度:9 mmBase Number Matches:1

BS616LV8019FCG70 数据手册

 浏览型号BS616LV8019FCG70的Datasheet PDF文件第2页浏览型号BS616LV8019FCG70的Datasheet PDF文件第3页浏览型号BS616LV8019FCG70的Datasheet PDF文件第4页浏览型号BS616LV8019FCG70的Datasheet PDF文件第5页浏览型号BS616LV8019FCG70的Datasheet PDF文件第6页浏览型号BS616LV8019FCG70的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
512K X 16 bit  
(Single CE Pin)  
BSI  
BS616LV8019  
„ FEATURES  
„ DESCRIPTION  
• Vcc operation voltage : 4.5~5.5V  
The BS616LV8019 is a high performance, very low power CMOS Static  
Random Access Memory organized as 524,288 words by 16 bits and  
operates from a range of 4.5V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current  
of 8.0uA at 5V/25oC and maximum access time of 55ns at 5.0V/85oC.  
Easy memory expansion is provided by an active LOW chip enable (CE)  
,active LOW output enable(OE) and three-state output drivers.  
The BS616LV8019 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
• Very low power consumption :  
Vcc = 5.0V C-grade: 75mA (@55ns) operating current  
I -grade: 76mA (@55ns) operating current  
C-grade: 60mA (@70ns) operating current  
I -grade: 61mA (@70ns) operating current  
8.0uA (Typ.) CMOS standby current  
• High speed access time :  
-55  
-70  
55ns  
70ns  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
The BS616LV8019 is available in 48B BGA and 44L TSOP2 packages.  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE and OE options  
• I/O Configuration x8/x16 selectable by LB and UB pin  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
( ICCSB1, Max )  
( ICC, Max )  
PKG TYPE  
Vcc=5V  
70ns  
Vcc=5V  
55ns  
55ns : 4.5~5.5V  
70ns : 4.5~5.5V  
Vcc=5V  
55uA  
BS616LV8019EC  
BS616LV8019FC  
BS616LV8019EI  
BS616LV8019FI  
TSOP2-44  
BGA-48-0912  
TSOP2-44  
+0O C to +70OC 4.5V ~ 5.5V  
-40OC to +85OC 4.5V ~ 5.5V  
55 / 70  
55 / 70  
75mA  
76mA  
60mA  
61mA  
110uA  
BGA-48-0912  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
1
2
3
4
5
6
7
8
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A4  
A3  
A2  
A1  
A0  
CE  
DQ0  
DQ1  
A5  
A6  
A7  
OE  
UB  
LB  
DQ15  
DQ14  
DQ13  
DQ12  
Vss  
A4  
A3  
A2  
A1  
A0  
Address  
Input  
22  
2048  
9
DQ2  
DQ3  
Vcc  
A17  
A16  
Row  
Memory Array  
2048 x 4096  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
BS616LV8019EC  
BS616LV8019EI  
Buffer  
Vss  
Vcc  
A15  
A14  
A13  
A12  
Decoder  
DQ4  
DQ5  
DQ6  
DQ7  
WE  
A18  
A17  
A16  
A15  
A14  
DQ11  
DQ10  
DQ9  
DQ8  
A8  
4096  
A9  
A10  
A11  
A12  
A13  
Data  
Input  
16  
16  
Column I/O  
D0  
Buffer  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
1
2
3
4
6
16  
5
A2  
256  
Data  
Output  
16  
LB  
OE  
A0  
A1  
NC  
A
B
C
D
E
F
Buffer  
Column Decoder  
D15  
D8  
D9  
UB  
A3  
A5  
A4  
A6  
A7  
CE  
D1  
D3  
D0  
D2  
D10  
D11  
16  
CE  
V
A17  
V
CC  
SS  
SS  
CC  
WE  
OE  
UB  
Control  
Address Input Buffer  
A16  
A 15  
A13  
A10  
D4  
D5  
VSS  
A14  
A12  
A9  
V
V
D12  
D13  
D6  
D14  
D15  
A18  
LB  
A11 A10 A9 A8 A7  
A6 A5 A18  
WE  
A11  
D7  
N.C  
A8  
Vcc  
Vss  
G
H
NC  
48-Ball CSP top View  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 2.1  
R0201-BS616LV8019  
1
Jan.  
2004  

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