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BD3532KN-TR PDF预览

BD3532KN-TR

更新时间: 2024-11-02 04:08:11
品牌 Logo 应用领域
罗姆 - ROHM 接口集成电路
页数 文件大小 规格书
17页 673K
描述
Terminator Support Circuit, ROHS COMPLIANT, VQFN-28

BD3532KN-TR 技术参数

生命周期:Active零件包装代码:QFN
包装说明:ROHS COMPLIANT, VQFN-28针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
差分输出:NO接口集成电路类型:BUS TERMINATOR SUPPORT CIRCUIT
JESD-30 代码:S-XQCC-N28长度:5.2 mm
功能数量:1端子数量:28
最高工作温度:100 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:VQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, VERY THIN PROFILE
座面最大高度:0.95 mm最大供电电压:5.5 V
最小供电电压:4.3 V标称供电电压:5 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:5.2 mm

BD3532KN-TR 数据手册

 浏览型号BD3532KN-TR的Datasheet PDF文件第2页浏览型号BD3532KN-TR的Datasheet PDF文件第3页浏览型号BD3532KN-TR的Datasheet PDF文件第4页浏览型号BD3532KN-TR的Datasheet PDF文件第5页浏览型号BD3532KN-TR的Datasheet PDF文件第6页浏览型号BD3532KN-TR的Datasheet PDF文件第7页 
TECHNICAL NOTE  
High-performance Regulator IC Series for PCs  
Termination Regulators  
for DDR-SDRAMs  
BD3533F/FVM/EKN(1A),BD3531F(1.5A),BD3532F/EFV/KN(3A)  
Description  
BD3533/31/32 is a termination regulator compatible with JEDEC DDR-SDRAM, which functions as a linear power supply  
incorporating an N-channel MOSFET and provides a sink/source current capability up to 1A, 1.5A, and 3A respectively.  
A
built-in high-speed OP-AMP specially designed offers an excellent transient response. Requires 3.3 volts or 5.0 volts as a  
bias power supply to drive the N-channel MOSFET. Has an independent reference voltage input pin (VDDQ) and an  
independent feedback pin (VTTS) to maintain the accuracy in voltage required by JEDEC, and offers an excellent output  
voltage accuracy and load regulation. Also has a reference power supply output pin (VREF) for DDR-SDRAM or a  
memory controller. When EN pin turns to “Low”, VTT output becomes “Hi-Z” while VREF output is kept unchanged,  
compatible with “Self Refresh” state of DDR-SDRAM.  
Features  
1) Incorporates a push-pull power supply for termination (VTT)  
2) Incorporates a reference voltage circuit (VREF)  
3) Incorporates an enabler  
4) Incorporates an undervoltage lockout (UVLO)  
5). Employs SOP8 package  
6) Employs MSOP8 package  
7) Employs HQFN20V package  
8) Employs HTSSOP-B20 package  
9) Employs VQFN28V package  
10) Incorporates a thermal shutdown protector (TSD)  
11) Operates with input voltage from 2.7 to 5.5 volts  
12) Compatible with Dual Channel (DDR-II)  
Use  
Power supply for DDR I/II - SDRAM  
Line up  
Parameter  
Output Current  
Vcc Range  
BD3533F/FVM/EKN  
±1.0A  
BD3531F  
±1.5A  
BD3532F/EFV/KN  
±3A  
4.35.5V  
2.7V5.5V  
4.5V5.5V  
×
Soft Start Function  
Temperature  
Package  
-20100℃  
-10100℃  
SOP8  
-40100℃  
SOP8/MSOP8/HQFN20V  
SOP8/HTSSOP-B20/VQFN28  
Oct. 2008  

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